[−][src]Struct stm32h7::stm32h743v::wwdg::cr::R
Value read from the register
Methods
impl R
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pub fn bits(&self) -> u32
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Value of the register as raw bits
pub fn t(&self) -> TR
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Bits 0:6 - 7-bit counter (MSB to LSB) These bits contain the value of the watchdog counter. It is decremented every (4096 x 2WDGTB[1:0]) PCLK cycles. A reset is produced when it is decremented from 0x40 to 0x3F (T6 becomes cleared).
pub fn wdga(&self) -> WDGAR
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Bit 7 - Activation bit This bit is set by software and only cleared by hardware after a reset. When WDGA=1, the watchdog can generate a reset.
Auto Trait Implementations
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impl<T, U> TryFrom<U> for T where
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U: Into<T>,
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The type returned in the event of a conversion error.
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impl<T, U> Into<U> for T where
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impl<T> From<T> for T
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U: TryFrom<T>,
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The type returned in the event of a conversion error.
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