Struct stm32h7::stm32h743v::pwr::csr1::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn pvdo(&self) -> PVDOR

Bit 4 - Programmable voltage detect output This bit is set and cleared by hardware. It is valid only if the PVD has been enabled by the PVDE bit. Note: since the PVD is disabled in Standby mode, this bit is equal to 0 after Standby or reset until the PVDE bit is set.

pub fn actvosrdy(&self) -> ACTVOSRDYR

Bit 13 - Voltage levels ready bit for currently used VOS and SDLEVEL This bit is set to 1 by hardware when the voltage regulator and the SD converter are both disabled and Bypass mode is selected in PWR control register 3 (PWR_CR3).

pub fn actvos(&self) -> ACTVOSR

Bits 14:15 - VOS currently applied for VCORE voltage scaling selection. These bits reflect the last VOS value applied to the PMU.

pub fn avdo(&self) -> AVDOR

Bit 16 - Analog voltage detector output on VDDA This bit is set and cleared by hardware. It is valid only if AVD on VDDA is enabled by the AVDEN bit. Note: Since the AVD is disabled in Standby mode, this bit is equal to 0 after Standby or reset until the AVDEN bit is set.