Struct stm32h7::stm32h743v::pwr::cr1::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn lpds(&mut self) -> _LPDSW

Bit 0 - Low-power Deepsleep with SVOS3 (SVOS4 and SVOS5 always use low-power, regardless of the setting of this bit)

pub fn pvde(&mut self) -> _PVDEW

Bit 4 - Programmable voltage detector enable

pub fn pls(&mut self) -> _PLSW

Bits 5:7 - Programmable voltage detector level selection These bits select the voltage threshold detected by the PVD. Note: Refer to Section Electrical characteristics of the product datasheet for more details.

pub fn dbp(&mut self) -> _DBPW

Bit 8 - Disable backup domain write protection In reset state, the RCC_BDCR register, the RTC registers (including the backup registers), BREN and MOEN bits in PWR_CR2 register, are protected against parasitic write access. This bit must be set to enable write access to these registers.

pub fn flps(&mut self) -> _FLPSW

Bit 9 - Flash low-power mode in DStop mode This bit allows to obtain the best trade-off between low-power consumption and restart time when exiting from DStop mode. When it is set, the Flash memory enters low-power mode when D1 domain is in DStop mode.

pub fn svos(&mut self) -> _SVOSW

Bits 14:15 - System Stop mode voltage scaling selection These bits control the VCORE voltage level in system Stop mode, to obtain the best trade-off between power consumption and performance.

pub fn avden(&mut self) -> _AVDENW

Bit 16 - Peripheral voltage monitor on VDDA enable

pub fn als(&mut self) -> _ALSW

Bits 17:18 - Analog voltage detector level selection These bits select the voltage threshold detected by the AVD.