[][src]Struct stm32h7::stm32h743v::gpioa::lckr::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R[src]

pub fn bits(&self) -> u32[src]

Value of the register as raw bits

pub fn lck0(&self) -> LCK0R[src]

Bit 0 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck1(&self) -> LCK1R[src]

Bit 1 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck2(&self) -> LCK2R[src]

Bit 2 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck3(&self) -> LCK3R[src]

Bit 3 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck4(&self) -> LCK4R[src]

Bit 4 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck5(&self) -> LCK5R[src]

Bit 5 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck6(&self) -> LCK6R[src]

Bit 6 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck7(&self) -> LCK7R[src]

Bit 7 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck8(&self) -> LCK8R[src]

Bit 8 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck9(&self) -> LCK9R[src]

Bit 9 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck10(&self) -> LCK10R[src]

Bit 10 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck11(&self) -> LCK11R[src]

Bit 11 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck12(&self) -> LCK12R[src]

Bit 12 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck13(&self) -> LCK13R[src]

Bit 13 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck14(&self) -> LCK14R[src]

Bit 14 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lck15(&self) -> LCK15R[src]

Bit 15 - Port x lock bit y (y= 0..15) These bits are read/write but can only be written when the LCKK bit is 0.

pub fn lckk(&self) -> LCKKR[src]

Bit 16 - Lock key This bit can be read any time. It can only be modified using the lock key write sequence. LOCK key write sequence: WR LCKR[16] = 1 + LCKR[15:0] WR LCKR[16] = 0 + LCKR[15:0] WR LCKR[16] = 1 + LCKR[15:0] RD LCKR RD LCKR[16] = 1 (this read operation is optional but it confirms that the lock is active) Note: During the LOCK key write sequence, the value of LCK[15:0] must not change. Any error in the lock sequence aborts the lock. After the first lock sequence on any bit of the port, any read access on the LCKK bit will return 1 until the next MCU reset or peripheral reset.

Auto Trait Implementations

impl Unpin for R

impl Send for R

impl Sync for R

Blanket Implementations

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> Into<U> for T where
    U: From<T>, 
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impl<T> From<T> for T[src]

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Same<T> for T

type Output = T

Should always be Self