[−][src]Struct stm32h7::stm32h743::fmc::sdrtr::R
Value read from the register
Methods
impl R[src]
pub fn bits(&self) -> u32[src]
Value of the register as raw bits
pub fn count(&self) -> COUNTR[src]
Bits 1:13 - Refresh Timer Count This 13-bit field defines the refresh rate of the SDRAM device. It is expressed in number of memory clock cycles. It must be set at least to 41 SDRAM clock cycles (0x29). Refresh rate = (COUNT + 1) x SDRAM frequency clock COUNT = (SDRAM refresh period / Number of rows) - 20
pub fn reie(&self) -> REIER[src]
Bit 14 - RES Interrupt Enable
Auto Trait Implementations
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