[−][src]Enum stm32h7::stm32h743::dmamux1::ccr::DMAREQ_IDW
Values that can be written to the field DMAREQ_ID
Variants
NONE
No signal selected as request input
DMAMUX1_REQ_GEN0
Signal dmamux1_req_gen0
selected as request input
DMAMUX1_REQ_GEN1
Signal dmamux1_req_gen1
selected as request input
DMAMUX1_REQ_GEN2
Signal dmamux1_req_gen2
selected as request input
DMAMUX1_REQ_GEN3
Signal dmamux1_req_gen3
selected as request input
DMAMUX1_REQ_GEN4
Signal dmamux1_req_gen4
selected as request input
DMAMUX1_REQ_GEN5
Signal dmamux1_req_gen5
selected as request input
DMAMUX1_REQ_GEN6
Signal dmamux1_req_gen6
selected as request input
DMAMUX1_REQ_GEN7
Signal dmamux1_req_gen7
selected as request input
ADC1_DMA
Signal adc1_dma
selected as request input
ADC2_DMA
Signal adc2_dma
selected as request input
TIM1_CH1
Signal tim1_ch1
selected as request input
TIM1_CH2
Signal tim1_ch2
selected as request input
TIM1_CH3
Signal tim1_ch3
selected as request input
TIM1_CH4
Signal tim1_ch4
selected as request input
TIM1_UP
Signal tim1_up
selected as request input
TIM1_TRIG
Signal tim1_trig
selected as request input
TIM1_COM
Signal tim1_com
selected as request input
TIM2_CH1
Signal tim2_ch1
selected as request input
TIM2_CH2
Signal tim2_ch2
selected as request input
TIM2_CH3
Signal tim2_ch3
selected as request input
TIM2_CH4
Signal tim2_ch4
selected as request input
TIM2_UP
Signal tim2_up
selected as request input
TIM3_CH1
Signal tim3_ch1
selected as request input
TIM3_CH2
Signal tim3_ch2
selected as request input
TIM3_CH3
Signal tim3_ch3
selected as request input
TIM3_CH4
Signal tim3_ch4
selected as request input
TIM3_UP
Signal tim3_up
selected as request input
TIM3_TRIG
Signal tim3_trig
selected as request input
TIM4_CH1
Signal tim4_ch1
selected as request input
TIM4_CH2
Signal tim4_ch2
selected as request input
TIM4_CH3
Signal tim4_ch3
selected as request input
TIM4_UP
Signal tim4_up
selected as request input
I2C1_RX_DMA
Signal i2c1_rx_dma
selected as request input
I2C1_TX_DMA
Signal i2c1_tx_dma
selected as request input
I2C2_RX_DMA
Signal i2c2_rx_dma
selected as request input
I2C2_TX_DMA
Signal i2c2_tx_dma
selected as request input
SPI1_RX_DMA
Signal spi1_rx_dma
selected as request input
SPI1_TX_DMA
Signal spi1_tx_dma
selected as request input
SPI2_RX_DMA
Signal spi2_rx_dma
selected as request input
SPI2_TX_DMA
Signal spi2_tx_dma
selected as request input
USART1_RX_DMA
Signal usart1_rx_dma
selected as request input
USART1_TX_DMA
Signal usart1_tx_dma
selected as request input
USART2_RX_DMA
Signal usart2_rx_dma
selected as request input
USART2_TX_DMA
Signal usart2_tx_dma
selected as request input
USART3_RX_DMA
Signal usart3_rx_dma
selected as request input
USART3_TX_DMA
Signal usart3_tx_dma
selected as request input
TIM8_CH1
Signal tim8_ch1
selected as request input
TIM8_CH2
Signal tim8_ch2
selected as request input
TIM8_CH3
Signal tim8_ch3
selected as request input
TIM8_CH4
Signal tim8_ch4
selected as request input
TIM8_UP
Signal tim8_up
selected as request input
TIM8_TRIG
Signal tim8_trig
selected as request input
TIM8_COM
Signal tim8_com
selected as request input
TIM5_CH1
Signal tim5_ch1
selected as request input
TIM5_CH2
Signal tim5_ch2
selected as request input
TIM5_CH3
Signal tim5_ch3
selected as request input
TIM5_CH4
Signal tim5_ch4
selected as request input
TIM5_UP
Signal tim5_up
selected as request input
TIM5_TRIG
Signal tim5_trig
selected as request input
SPI3_RX_DMA
Signal spi3_rx_dma
selected as request input
SPI3_TX_DMA
Signal spi3_tx_dma
selected as request input
UART4_RX_DMA
Signal uart4_rx_dma
selected as request input
UART4_TX_DMA
Signal uart4_tx_dma
selected as request input
UART5_RX_DMA
Signal uart5_rx_dma
selected as request input
UART5_TX_DMA
Signal uart5_tx_dma
selected as request input
DAC_CH1_DMA
Signal dac_ch1_dma
selected as request input
DAC_CH2_DMA
Signal dac_ch2_dma
selected as request input
TIM6_UP
Signal tim6_up
selected as request input
TIM7_UP
Signal tim7_up
selected as request input
USART6_RX_DMA
Signal usart6_rx_dma
selected as request input
USART6_TX_DMA
Signal usart6_tx_dma
selected as request input
I2C3_RX_DMA
Signal i2c3_rx_dma
selected as request input
I2C3_TX_DMA
Signal i2c3_tx_dma
selected as request input
DCMI_DMA
Signal dcmi_dma
selected as request input
CRYP_IN_DMA
Signal cryp_in_dma
selected as request input
CRYP_OUT_DMA
Signal cryp_out_dma
selected as request input
HASH_IN_DMA
Signal hash_in_dma
selected as request input
UART7_RX_DMA
Signal uart7_rx_dma
selected as request input
UART7_TX_DMA
Signal uart7_tx_dma
selected as request input
UART8_RX_DMA
Signal uart8_rx_dma
selected as request input
UART8_TX_DMA
Signal uart8_tx_dma
selected as request input
SPI4_RX_DMA
Signal spi4_rx_dma
selected as request input
SPI4_TX_DMA
Signal spi4_tx_dma
selected as request input
SPI5_RX_DMA
Signal spi5_rx_dma
selected as request input
SPI5_TX_DMA
Signal spi5_tx_dma
selected as request input
SAI1A_DMA
Signal sai1a_dma
selected as request input
SAI1B_DMA
Signal sai1b_dma
selected as request input
SAI2A_DMA
Signal sai2a_dma
selected as request input
SAI2B_DMA
Signal sai2b_dma
selected as request input
SWPMI_RX_DMA
Signal swpmi_rx_dma
selected as request input
SWPMI_TX_DMA
Signal swpmi_tx_dma
selected as request input
SPDIFRX_DAT_DMA
Signal spdifrx_dat_dma
selected as request input
SPDIFRX_CTRL_DMA
Signal spdifrx_ctrl_dma
selected as request input
HR_REQ1
Signal hr_req(1)
selected as request input
HR_REQ2
Signal hr_req(2)
selected as request input
HR_REQ3
Signal hr_req(3)
selected as request input
HR_REQ4
Signal hr_req(4)
selected as request input
HR_REQ5
Signal hr_req(5)
selected as request input
HR_REQ6
Signal hr_req(6)
selected as request input
DFSDM1_DMA0
Signal dfsdm1_dma0
selected as request input
DFSDM1_DMA1
Signal dfsdm1_dma1
selected as request input
DFSDM1_DMA2
Signal dfsdm1_dma2
selected as request input
DFSDM1_DMA3
Signal dfsdm1_dma3
selected as request input
TIM15_CH1
Signal tim15_ch1
selected as request input
TIM15_UP
Signal tim15_up
selected as request input
TIM15_TRIG
Signal tim15_trig
selected as request input
TIM15_COM
Signal tim15_com
selected as request input
TIM16_CH1
Signal tim16_ch1
selected as request input
TIM16_UP
Signal tim16_up
selected as request input
TIM17_CH1
Signal tim17_ch1
selected as request input
TIM17_UP
Signal tim17_up
selected as request input
SAI3_A_DMA
Signal sai3_a_dma
selected as request input
SAI3_B_DMA
Signal sai3_b_dma
selected as request input
ADC3_DMA
Signal adc3_dma
selected as request input
Trait Implementations
impl Debug for DMAREQ_IDW
[src]
impl PartialEq<DMAREQ_IDW> for DMAREQ_IDW
[src]
fn eq(&self, other: &DMAREQ_IDW) -> bool
[src]
#[must_use]
fn ne(&self, other: &Rhs) -> bool
1.0.0[src]
This method tests for !=
.
impl Copy for DMAREQ_IDW
[src]
impl Clone for DMAREQ_IDW
[src]
fn clone(&self) -> DMAREQ_IDW
[src]
fn clone_from(&mut self, source: &Self)
1.0.0[src]
Performs copy-assignment from source
. Read more
Auto Trait Implementations
Blanket Implementations
impl<T, U> TryFrom<U> for T where
U: Into<T>,
[src]
U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
[src]
impl<T, U> Into<U> for T where
U: From<T>,
[src]
U: From<T>,
impl<T> From<T> for T
[src]
impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
[src]
U: TryFrom<T>,
type Error = <U as TryFrom<T>>::Error
The type returned in the event of a conversion error.
fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>
[src]
impl<T> Borrow<T> for T where
T: ?Sized,
[src]
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
[src]
T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
[src]
impl<T> Any for T where
T: 'static + ?Sized,
[src]
T: 'static + ?Sized,
impl<T> Same<T> for T
type Output = T
Should always be Self