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#[doc = r"Value read from the register"] pub struct R { bits: u32, } #[doc = r"Value to write to the register"] pub struct W { bits: u32, } impl super::D3CFGR { #[doc = r"Modifies the contents of the register"] #[inline(always)] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); self.register.set(f(&R { bits }, &mut W { bits }).bits); } #[doc = r"Reads the contents of the register"] #[inline(always)] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r"Writes to the register"] #[inline(always)] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { self.register.set( f(&mut W { bits: Self::reset_value(), }) .bits, ); } #[doc = r"Reset value of the register"] #[inline(always)] pub const fn reset_value() -> u32 { 0 } #[doc = r"Writes the reset value to the register"] #[inline(always)] pub fn reset(&self) { self.register.set(Self::reset_value()) } } #[doc = "Possible values of the field `D3PPRE`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum D3PPRER { #[doc = "rcc_hclk not divided"] DIV1, #[doc = "rcc_hclk divided by 2"] DIV2, #[doc = "rcc_hclk divided by 4"] DIV4, #[doc = "rcc_hclk divided by 8"] DIV8, #[doc = "rcc_hclk divided by 16"] DIV16, #[doc = r"Reserved"] _Reserved(u8), } impl D3PPRER { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { match *self { D3PPRER::DIV1 => 0, D3PPRER::DIV2 => 0x04, D3PPRER::DIV4 => 0x05, D3PPRER::DIV8 => 0x06, D3PPRER::DIV16 => 0x07, D3PPRER::_Reserved(bits) => bits, } } #[allow(missing_docs)] #[doc(hidden)] #[inline(always)] pub fn _from(value: u8) -> D3PPRER { match value { 0 => D3PPRER::DIV1, 4 => D3PPRER::DIV2, 5 => D3PPRER::DIV4, 6 => D3PPRER::DIV8, 7 => D3PPRER::DIV16, i => D3PPRER::_Reserved(i), } } #[doc = "Checks if the value of the field is `DIV1`"] #[inline(always)] pub fn is_div1(&self) -> bool { *self == D3PPRER::DIV1 } #[doc = "Checks if the value of the field is `DIV2`"] #[inline(always)] pub fn is_div2(&self) -> bool { *self == D3PPRER::DIV2 } #[doc = "Checks if the value of the field is `DIV4`"] #[inline(always)] pub fn is_div4(&self) -> bool { *self == D3PPRER::DIV4 } #[doc = "Checks if the value of the field is `DIV8`"] #[inline(always)] pub fn is_div8(&self) -> bool { *self == D3PPRER::DIV8 } #[doc = "Checks if the value of the field is `DIV16`"] #[inline(always)] pub fn is_div16(&self) -> bool { *self == D3PPRER::DIV16 } } #[doc = "Values that can be written to the field `D3PPRE`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum D3PPREW { #[doc = "rcc_hclk not divided"] DIV1, #[doc = "rcc_hclk divided by 2"] DIV2, #[doc = "rcc_hclk divided by 4"] DIV4, #[doc = "rcc_hclk divided by 8"] DIV8, #[doc = "rcc_hclk divided by 16"] DIV16, } impl D3PPREW { #[allow(missing_docs)] #[doc(hidden)] #[inline(always)] pub fn _bits(&self) -> u8 { match *self { D3PPREW::DIV1 => 0, D3PPREW::DIV2 => 4, D3PPREW::DIV4 => 5, D3PPREW::DIV8 => 6, D3PPREW::DIV16 => 7, } } } #[doc = r"Proxy"] pub struct _D3PPREW<'a> { w: &'a mut W, } impl<'a> _D3PPREW<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: D3PPREW) -> &'a mut W { unsafe { self.bits(variant._bits()) } } #[doc = "rcc_hclk not divided"] #[inline(always)] pub fn div1(self) -> &'a mut W { self.variant(D3PPREW::DIV1) } #[doc = "rcc_hclk divided by 2"] #[inline(always)] pub fn div2(self) -> &'a mut W { self.variant(D3PPREW::DIV2) } #[doc = "rcc_hclk divided by 4"] #[inline(always)] pub fn div4(self) -> &'a mut W { self.variant(D3PPREW::DIV4) } #[doc = "rcc_hclk divided by 8"] #[inline(always)] pub fn div8(self) -> &'a mut W { self.variant(D3PPREW::DIV8) } #[doc = "rcc_hclk divided by 16"] #[inline(always)] pub fn div16(self) -> &'a mut W { self.variant(D3PPREW::DIV16) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0x07 << 4); self.w.bits |= ((value as u32) & 0x07) << 4; self.w } } impl R { #[doc = r"Value of the register as raw bits"] #[inline(always)] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bits 4:6 - D3 domain APB4 prescaler"] #[inline(always)] pub fn d3ppre(&self) -> D3PPRER { D3PPRER::_from(((self.bits >> 4) & 0x07) as u8) } } impl W { #[doc = r"Writes raw bits to the register"] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bits 4:6 - D3 domain APB4 prescaler"] #[inline(always)] pub fn d3ppre(&mut self) -> _D3PPREW { _D3PPREW { w: self } } }