#[doc = r"Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r"Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::D1CFGR {
#[doc = r"Modifies the contents of the register"]
#[inline(always)]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
self.register.set(f(&R { bits }, &mut W { bits }).bits);
}
#[doc = r"Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r"Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
self.register.set(
f(&mut W {
bits: Self::reset_value(),
})
.bits,
);
}
#[doc = r"Reset value of the register"]
#[inline(always)]
pub const fn reset_value() -> u32 {
0
}
#[doc = r"Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.register.set(Self::reset_value())
}
}
#[doc = "Possible values of the field `HPRE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HPRER {
#[doc = "sys_ck not divided"]
DIV1,
#[doc = "sys_ck divided by 2"]
DIV2,
#[doc = "sys_ck divided by 4"]
DIV4,
#[doc = "sys_ck divided by 8"]
DIV8,
#[doc = "sys_ck divided by 16"]
DIV16,
#[doc = "sys_ck divided by 64"]
DIV64,
#[doc = "sys_ck divided by 128"]
DIV128,
#[doc = "sys_ck divided by 256"]
DIV256,
#[doc = "sys_ck divided by 512"]
DIV512,
#[doc = r"Reserved"]
_Reserved(u8),
}
impl HPRER {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
HPRER::DIV1 => 0,
HPRER::DIV2 => 0x08,
HPRER::DIV4 => 0x09,
HPRER::DIV8 => 0x0a,
HPRER::DIV16 => 0x0b,
HPRER::DIV64 => 0x0c,
HPRER::DIV128 => 0x0d,
HPRER::DIV256 => 0x0e,
HPRER::DIV512 => 0x0f,
HPRER::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> HPRER {
match value {
0 => HPRER::DIV1,
8 => HPRER::DIV2,
9 => HPRER::DIV4,
10 => HPRER::DIV8,
11 => HPRER::DIV16,
12 => HPRER::DIV64,
13 => HPRER::DIV128,
14 => HPRER::DIV256,
15 => HPRER::DIV512,
i => HPRER::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `DIV1`"]
#[inline(always)]
pub fn is_div1(&self) -> bool {
*self == HPRER::DIV1
}
#[doc = "Checks if the value of the field is `DIV2`"]
#[inline(always)]
pub fn is_div2(&self) -> bool {
*self == HPRER::DIV2
}
#[doc = "Checks if the value of the field is `DIV4`"]
#[inline(always)]
pub fn is_div4(&self) -> bool {
*self == HPRER::DIV4
}
#[doc = "Checks if the value of the field is `DIV8`"]
#[inline(always)]
pub fn is_div8(&self) -> bool {
*self == HPRER::DIV8
}
#[doc = "Checks if the value of the field is `DIV16`"]
#[inline(always)]
pub fn is_div16(&self) -> bool {
*self == HPRER::DIV16
}
#[doc = "Checks if the value of the field is `DIV64`"]
#[inline(always)]
pub fn is_div64(&self) -> bool {
*self == HPRER::DIV64
}
#[doc = "Checks if the value of the field is `DIV128`"]
#[inline(always)]
pub fn is_div128(&self) -> bool {
*self == HPRER::DIV128
}
#[doc = "Checks if the value of the field is `DIV256`"]
#[inline(always)]
pub fn is_div256(&self) -> bool {
*self == HPRER::DIV256
}
#[doc = "Checks if the value of the field is `DIV512`"]
#[inline(always)]
pub fn is_div512(&self) -> bool {
*self == HPRER::DIV512
}
}
#[doc = "Values that can be written to the field `HPRE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HPREW {
#[doc = "sys_ck not divided"]
DIV1,
#[doc = "sys_ck divided by 2"]
DIV2,
#[doc = "sys_ck divided by 4"]
DIV4,
#[doc = "sys_ck divided by 8"]
DIV8,
#[doc = "sys_ck divided by 16"]
DIV16,
#[doc = "sys_ck divided by 64"]
DIV64,
#[doc = "sys_ck divided by 128"]
DIV128,
#[doc = "sys_ck divided by 256"]
DIV256,
#[doc = "sys_ck divided by 512"]
DIV512,
}
impl HPREW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
HPREW::DIV1 => 0,
HPREW::DIV2 => 8,
HPREW::DIV4 => 9,
HPREW::DIV8 => 10,
HPREW::DIV16 => 11,
HPREW::DIV64 => 12,
HPREW::DIV128 => 13,
HPREW::DIV256 => 14,
HPREW::DIV512 => 15,
}
}
}
#[doc = r"Proxy"]
pub struct _HPREW<'a> {
w: &'a mut W,
}
impl<'a> _HPREW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: HPREW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "sys_ck not divided"]
#[inline(always)]
pub fn div1(self) -> &'a mut W {
self.variant(HPREW::DIV1)
}
#[doc = "sys_ck divided by 2"]
#[inline(always)]
pub fn div2(self) -> &'a mut W {
self.variant(HPREW::DIV2)
}
#[doc = "sys_ck divided by 4"]
#[inline(always)]
pub fn div4(self) -> &'a mut W {
self.variant(HPREW::DIV4)
}
#[doc = "sys_ck divided by 8"]
#[inline(always)]
pub fn div8(self) -> &'a mut W {
self.variant(HPREW::DIV8)
}
#[doc = "sys_ck divided by 16"]
#[inline(always)]
pub fn div16(self) -> &'a mut W {
self.variant(HPREW::DIV16)
}
#[doc = "sys_ck divided by 64"]
#[inline(always)]
pub fn div64(self) -> &'a mut W {
self.variant(HPREW::DIV64)
}
#[doc = "sys_ck divided by 128"]
#[inline(always)]
pub fn div128(self) -> &'a mut W {
self.variant(HPREW::DIV128)
}
#[doc = "sys_ck divided by 256"]
#[inline(always)]
pub fn div256(self) -> &'a mut W {
self.variant(HPREW::DIV256)
}
#[doc = "sys_ck divided by 512"]
#[inline(always)]
pub fn div512(self) -> &'a mut W {
self.variant(HPREW::DIV512)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x0f << 0);
self.w.bits |= ((value as u32) & 0x0f) << 0;
self.w
}
}
#[doc = "Possible values of the field `D1PPRE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum D1PPRER {
#[doc = "rcc_hclk not divided"]
DIV1,
#[doc = "rcc_hclk divided by 2"]
DIV2,
#[doc = "rcc_hclk divided by 4"]
DIV4,
#[doc = "rcc_hclk divided by 8"]
DIV8,
#[doc = "rcc_hclk divided by 16"]
DIV16,
#[doc = r"Reserved"]
_Reserved(u8),
}
impl D1PPRER {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
D1PPRER::DIV1 => 0,
D1PPRER::DIV2 => 0x04,
D1PPRER::DIV4 => 0x05,
D1PPRER::DIV8 => 0x06,
D1PPRER::DIV16 => 0x07,
D1PPRER::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> D1PPRER {
match value {
0 => D1PPRER::DIV1,
4 => D1PPRER::DIV2,
5 => D1PPRER::DIV4,
6 => D1PPRER::DIV8,
7 => D1PPRER::DIV16,
i => D1PPRER::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `DIV1`"]
#[inline(always)]
pub fn is_div1(&self) -> bool {
*self == D1PPRER::DIV1
}
#[doc = "Checks if the value of the field is `DIV2`"]
#[inline(always)]
pub fn is_div2(&self) -> bool {
*self == D1PPRER::DIV2
}
#[doc = "Checks if the value of the field is `DIV4`"]
#[inline(always)]
pub fn is_div4(&self) -> bool {
*self == D1PPRER::DIV4
}
#[doc = "Checks if the value of the field is `DIV8`"]
#[inline(always)]
pub fn is_div8(&self) -> bool {
*self == D1PPRER::DIV8
}
#[doc = "Checks if the value of the field is `DIV16`"]
#[inline(always)]
pub fn is_div16(&self) -> bool {
*self == D1PPRER::DIV16
}
}
#[doc = "Values that can be written to the field `D1PPRE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum D1PPREW {
#[doc = "rcc_hclk not divided"]
DIV1,
#[doc = "rcc_hclk divided by 2"]
DIV2,
#[doc = "rcc_hclk divided by 4"]
DIV4,
#[doc = "rcc_hclk divided by 8"]
DIV8,
#[doc = "rcc_hclk divided by 16"]
DIV16,
}
impl D1PPREW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
D1PPREW::DIV1 => 0,
D1PPREW::DIV2 => 4,
D1PPREW::DIV4 => 5,
D1PPREW::DIV8 => 6,
D1PPREW::DIV16 => 7,
}
}
}
#[doc = r"Proxy"]
pub struct _D1PPREW<'a> {
w: &'a mut W,
}
impl<'a> _D1PPREW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: D1PPREW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "rcc_hclk not divided"]
#[inline(always)]
pub fn div1(self) -> &'a mut W {
self.variant(D1PPREW::DIV1)
}
#[doc = "rcc_hclk divided by 2"]
#[inline(always)]
pub fn div2(self) -> &'a mut W {
self.variant(D1PPREW::DIV2)
}
#[doc = "rcc_hclk divided by 4"]
#[inline(always)]
pub fn div4(self) -> &'a mut W {
self.variant(D1PPREW::DIV4)
}
#[doc = "rcc_hclk divided by 8"]
#[inline(always)]
pub fn div8(self) -> &'a mut W {
self.variant(D1PPREW::DIV8)
}
#[doc = "rcc_hclk divided by 16"]
#[inline(always)]
pub fn div16(self) -> &'a mut W {
self.variant(D1PPREW::DIV16)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x07 << 4);
self.w.bits |= ((value as u32) & 0x07) << 4;
self.w
}
}
#[doc = "Possible values of the field `D1CPRE`"]
pub type D1CPRER = HPRER;
#[doc = "Values that can be written to the field `D1CPRE`"]
pub type D1CPREW = HPREW;
#[doc = r"Proxy"]
pub struct _D1CPREW<'a> {
w: &'a mut W,
}
impl<'a> _D1CPREW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: D1CPREW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "sys_ck not divided"]
#[inline(always)]
pub fn div1(self) -> &'a mut W {
self.variant(HPREW::DIV1)
}
#[doc = "sys_ck divided by 2"]
#[inline(always)]
pub fn div2(self) -> &'a mut W {
self.variant(HPREW::DIV2)
}
#[doc = "sys_ck divided by 4"]
#[inline(always)]
pub fn div4(self) -> &'a mut W {
self.variant(HPREW::DIV4)
}
#[doc = "sys_ck divided by 8"]
#[inline(always)]
pub fn div8(self) -> &'a mut W {
self.variant(HPREW::DIV8)
}
#[doc = "sys_ck divided by 16"]
#[inline(always)]
pub fn div16(self) -> &'a mut W {
self.variant(HPREW::DIV16)
}
#[doc = "sys_ck divided by 64"]
#[inline(always)]
pub fn div64(self) -> &'a mut W {
self.variant(HPREW::DIV64)
}
#[doc = "sys_ck divided by 128"]
#[inline(always)]
pub fn div128(self) -> &'a mut W {
self.variant(HPREW::DIV128)
}
#[doc = "sys_ck divided by 256"]
#[inline(always)]
pub fn div256(self) -> &'a mut W {
self.variant(HPREW::DIV256)
}
#[doc = "sys_ck divided by 512"]
#[inline(always)]
pub fn div512(self) -> &'a mut W {
self.variant(HPREW::DIV512)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x0f << 8);
self.w.bits |= ((value as u32) & 0x0f) << 8;
self.w
}
}
impl R {
#[doc = r"Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:3 - D1 domain AHB prescaler"]
#[inline(always)]
pub fn hpre(&self) -> HPRER {
HPRER::_from(((self.bits >> 0) & 0x0f) as u8)
}
#[doc = "Bits 4:6 - D1 domain APB3 prescaler"]
#[inline(always)]
pub fn d1ppre(&self) -> D1PPRER {
D1PPRER::_from(((self.bits >> 4) & 0x07) as u8)
}
#[doc = "Bits 8:11 - D1 domain Core prescaler"]
#[inline(always)]
pub fn d1cpre(&self) -> D1CPRER {
D1CPRER::_from(((self.bits >> 8) & 0x0f) as u8)
}
}
impl W {
#[doc = r"Writes raw bits to the register"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:3 - D1 domain AHB prescaler"]
#[inline(always)]
pub fn hpre(&mut self) -> _HPREW {
_HPREW { w: self }
}
#[doc = "Bits 4:6 - D1 domain APB3 prescaler"]
#[inline(always)]
pub fn d1ppre(&mut self) -> _D1PPREW {
_D1PPREW { w: self }
}
#[doc = "Bits 8:11 - D1 domain Core prescaler"]
#[inline(always)]
pub fn d1cpre(&mut self) -> _D1CPREW {
_D1CPREW { w: self }
}
}