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#[doc = r"Value read from the register"] pub struct R { bits: u32, } impl super::MMC_TX_INTERRUPT { #[doc = r"Reads the contents of the register"] #[inline(always)] pub fn read(&self) -> R { R { bits: self.register.get(), } } } #[doc = r"Value of the field"] pub struct TXSCOLGPISR { bits: bool, } impl TXSCOLGPISR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Value of the field"] pub struct TXMCOLGPISR { bits: bool, } impl TXMCOLGPISR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Value of the field"] pub struct TXGPKTISR { bits: bool, } impl TXGPKTISR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Value of the field"] pub struct TXLPIUSCISR { bits: bool, } impl TXLPIUSCISR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Value of the field"] pub struct TXLPITRCISR { bits: bool, } impl TXLPITRCISR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } impl R { #[doc = r"Value of the register as raw bits"] #[inline(always)] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bit 14 - MMC Transmit Single Collision Good Packet Counter Interrupt Status"] #[inline(always)] pub fn txscolgpis(&self) -> TXSCOLGPISR { let bits = ((self.bits >> 14) & 0x01) != 0; TXSCOLGPISR { bits } } #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Packet Counter Interrupt Status"] #[inline(always)] pub fn txmcolgpis(&self) -> TXMCOLGPISR { let bits = ((self.bits >> 15) & 0x01) != 0; TXMCOLGPISR { bits } } #[doc = "Bit 21 - MMC Transmit Good Packet Counter Interrupt Status"] #[inline(always)] pub fn txgpktis(&self) -> TXGPKTISR { let bits = ((self.bits >> 21) & 0x01) != 0; TXGPKTISR { bits } } #[doc = "Bit 26 - MMC Transmit LPI microsecond counter interrupt status"] #[inline(always)] pub fn txlpiuscis(&self) -> TXLPIUSCISR { let bits = ((self.bits >> 26) & 0x01) != 0; TXLPIUSCISR { bits } } #[doc = "Bit 27 - MMC Transmit LPI transition counter interrupt status"] #[inline(always)] pub fn txlpitrcis(&self) -> TXLPITRCISR { let bits = ((self.bits >> 27) & 0x01) != 0; TXLPITRCISR { bits } } }