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#[doc = r"Value read from the register"] pub struct R { bits: u32, } #[doc = r"Value to write to the register"] pub struct W { bits: u32, } impl super::MACL3L4C0R { #[doc = r"Modifies the contents of the register"] #[inline(always)] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); self.register.set(f(&R { bits }, &mut W { bits }).bits); } #[doc = r"Reads the contents of the register"] #[inline(always)] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r"Writes to the register"] #[inline(always)] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { self.register.set( f(&mut W { bits: Self::reset_value(), }) .bits, ); } #[doc = r"Reset value of the register"] #[inline(always)] pub const fn reset_value() -> u32 { 0 } #[doc = r"Writes the reset value to the register"] #[inline(always)] pub fn reset(&self) { self.register.set(Self::reset_value()) } } #[doc = r"Value of the field"] pub struct L3PEN0R { bits: bool, } impl L3PEN0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _L3PEN0W<'a> { w: &'a mut W, } impl<'a> _L3PEN0W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 0); self.w.bits |= ((value as u32) & 0x01) << 0; self.w } } #[doc = r"Value of the field"] pub struct L3SAM0R { bits: bool, } impl L3SAM0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _L3SAM0W<'a> { w: &'a mut W, } impl<'a> _L3SAM0W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 2); self.w.bits |= ((value as u32) & 0x01) << 2; self.w } } #[doc = r"Value of the field"] pub struct L3SAIM0R { bits: bool, } impl L3SAIM0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _L3SAIM0W<'a> { w: &'a mut W, } impl<'a> _L3SAIM0W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 3); self.w.bits |= ((value as u32) & 0x01) << 3; self.w } } #[doc = r"Value of the field"] pub struct L3DAM0R { bits: bool, } impl L3DAM0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _L3DAM0W<'a> { w: &'a mut W, } impl<'a> _L3DAM0W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 4); self.w.bits |= ((value as u32) & 0x01) << 4; self.w } } #[doc = r"Value of the field"] pub struct L3DAIM0R { bits: bool, } impl L3DAIM0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _L3DAIM0W<'a> { w: &'a mut W, } impl<'a> _L3DAIM0W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 5); self.w.bits |= ((value as u32) & 0x01) << 5; self.w } } #[doc = r"Value of the field"] pub struct L3HSBM0R { bits: u8, } impl L3HSBM0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _L3HSBM0W<'a> { w: &'a mut W, } impl<'a> _L3HSBM0W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0x1f << 6); self.w.bits |= ((value as u32) & 0x1f) << 6; self.w } } #[doc = r"Value of the field"] pub struct L3HDBM0R { bits: u8, } impl L3HDBM0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _L3HDBM0W<'a> { w: &'a mut W, } impl<'a> _L3HDBM0W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0x1f << 11); self.w.bits |= ((value as u32) & 0x1f) << 11; self.w } } #[doc = r"Value of the field"] pub struct L4PEN0R { bits: bool, } impl L4PEN0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _L4PEN0W<'a> { w: &'a mut W, } impl<'a> _L4PEN0W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 16); self.w.bits |= ((value as u32) & 0x01) << 16; self.w } } #[doc = r"Value of the field"] pub struct L4SPM0R { bits: bool, } impl L4SPM0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _L4SPM0W<'a> { w: &'a mut W, } impl<'a> _L4SPM0W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 18); self.w.bits |= ((value as u32) & 0x01) << 18; self.w } } #[doc = r"Value of the field"] pub struct L4SPIM0R { bits: bool, } impl L4SPIM0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _L4SPIM0W<'a> { w: &'a mut W, } impl<'a> _L4SPIM0W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 19); self.w.bits |= ((value as u32) & 0x01) << 19; self.w } } #[doc = r"Value of the field"] pub struct L4DPM0R { bits: bool, } impl L4DPM0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _L4DPM0W<'a> { w: &'a mut W, } impl<'a> _L4DPM0W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 20); self.w.bits |= ((value as u32) & 0x01) << 20; self.w } } #[doc = r"Value of the field"] pub struct L4DPIM0R { bits: bool, } impl L4DPIM0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _L4DPIM0W<'a> { w: &'a mut W, } impl<'a> _L4DPIM0W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 21); self.w.bits |= ((value as u32) & 0x01) << 21; self.w } } impl R { #[doc = r"Value of the register as raw bits"] #[inline(always)] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bit 0 - Layer 3 Protocol Enable"] #[inline(always)] pub fn l3pen0(&self) -> L3PEN0R { let bits = ((self.bits >> 0) & 0x01) != 0; L3PEN0R { bits } } #[doc = "Bit 2 - Layer 3 IP SA Match Enable"] #[inline(always)] pub fn l3sam0(&self) -> L3SAM0R { let bits = ((self.bits >> 2) & 0x01) != 0; L3SAM0R { bits } } #[doc = "Bit 3 - Layer 3 IP SA Inverse Match Enable"] #[inline(always)] pub fn l3saim0(&self) -> L3SAIM0R { let bits = ((self.bits >> 3) & 0x01) != 0; L3SAIM0R { bits } } #[doc = "Bit 4 - Layer 3 IP DA Match Enable"] #[inline(always)] pub fn l3dam0(&self) -> L3DAM0R { let bits = ((self.bits >> 4) & 0x01) != 0; L3DAM0R { bits } } #[doc = "Bit 5 - Layer 3 IP DA Inverse Match Enable"] #[inline(always)] pub fn l3daim0(&self) -> L3DAIM0R { let bits = ((self.bits >> 5) & 0x01) != 0; L3DAIM0R { bits } } #[doc = "Bits 6:10 - Layer 3 IP SA Higher Bits Match"] #[inline(always)] pub fn l3hsbm0(&self) -> L3HSBM0R { let bits = ((self.bits >> 6) & 0x1f) as u8; L3HSBM0R { bits } } #[doc = "Bits 11:15 - Layer 3 IP DA Higher Bits Match"] #[inline(always)] pub fn l3hdbm0(&self) -> L3HDBM0R { let bits = ((self.bits >> 11) & 0x1f) as u8; L3HDBM0R { bits } } #[doc = "Bit 16 - Layer 4 Protocol Enable"] #[inline(always)] pub fn l4pen0(&self) -> L4PEN0R { let bits = ((self.bits >> 16) & 0x01) != 0; L4PEN0R { bits } } #[doc = "Bit 18 - Layer 4 Source Port Match Enable"] #[inline(always)] pub fn l4spm0(&self) -> L4SPM0R { let bits = ((self.bits >> 18) & 0x01) != 0; L4SPM0R { bits } } #[doc = "Bit 19 - Layer 4 Source Port Inverse Match Enable"] #[inline(always)] pub fn l4spim0(&self) -> L4SPIM0R { let bits = ((self.bits >> 19) & 0x01) != 0; L4SPIM0R { bits } } #[doc = "Bit 20 - Layer 4 Destination Port Match Enable"] #[inline(always)] pub fn l4dpm0(&self) -> L4DPM0R { let bits = ((self.bits >> 20) & 0x01) != 0; L4DPM0R { bits } } #[doc = "Bit 21 - Layer 4 Destination Port Inverse Match Enable"] #[inline(always)] pub fn l4dpim0(&self) -> L4DPIM0R { let bits = ((self.bits >> 21) & 0x01) != 0; L4DPIM0R { bits } } } impl W { #[doc = r"Writes raw bits to the register"] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bit 0 - Layer 3 Protocol Enable"] #[inline(always)] pub fn l3pen0(&mut self) -> _L3PEN0W { _L3PEN0W { w: self } } #[doc = "Bit 2 - Layer 3 IP SA Match Enable"] #[inline(always)] pub fn l3sam0(&mut self) -> _L3SAM0W { _L3SAM0W { w: self } } #[doc = "Bit 3 - Layer 3 IP SA Inverse Match Enable"] #[inline(always)] pub fn l3saim0(&mut self) -> _L3SAIM0W { _L3SAIM0W { w: self } } #[doc = "Bit 4 - Layer 3 IP DA Match Enable"] #[inline(always)] pub fn l3dam0(&mut self) -> _L3DAM0W { _L3DAM0W { w: self } } #[doc = "Bit 5 - Layer 3 IP DA Inverse Match Enable"] #[inline(always)] pub fn l3daim0(&mut self) -> _L3DAIM0W { _L3DAIM0W { w: self } } #[doc = "Bits 6:10 - Layer 3 IP SA Higher Bits Match"] #[inline(always)] pub fn l3hsbm0(&mut self) -> _L3HSBM0W { _L3HSBM0W { w: self } } #[doc = "Bits 11:15 - Layer 3 IP DA Higher Bits Match"] #[inline(always)] pub fn l3hdbm0(&mut self) -> _L3HDBM0W { _L3HDBM0W { w: self } } #[doc = "Bit 16 - Layer 4 Protocol Enable"] #[inline(always)] pub fn l4pen0(&mut self) -> _L4PEN0W { _L4PEN0W { w: self } } #[doc = "Bit 18 - Layer 4 Source Port Match Enable"] #[inline(always)] pub fn l4spm0(&mut self) -> _L4SPM0W { _L4SPM0W { w: self } } #[doc = "Bit 19 - Layer 4 Source Port Inverse Match Enable"] #[inline(always)] pub fn l4spim0(&mut self) -> _L4SPIM0W { _L4SPIM0W { w: self } } #[doc = "Bit 20 - Layer 4 Destination Port Match Enable"] #[inline(always)] pub fn l4dpm0(&mut self) -> _L4DPM0W { _L4DPM0W { w: self } } #[doc = "Bit 21 - Layer 4 Destination Port Inverse Match Enable"] #[inline(always)] pub fn l4dpim0(&mut self) -> _L4DPIM0W { _L4DPIM0W { w: self } } }