#[doc = r"Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r"Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CR {
#[doc = r"Modifies the contents of the register"]
#[inline(always)]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
self.register.set(f(&R { bits }, &mut W { bits }).bits);
}
#[doc = r"Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r"Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
self.register.set(
f(&mut W {
bits: Self::reset_value(),
})
.bits,
);
}
#[doc = r"Reset value of the register"]
#[inline(always)]
pub const fn reset_value() -> u32 {
0
}
#[doc = r"Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.register.set(Self::reset_value())
}
}
#[doc = "Possible values of the field `ADCAL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADCALR {
#[doc = "Calibration complete"]
COMPLETE,
#[doc = "Start the calibration of the ADC"]
CALIBRATION,
}
impl ADCALR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
ADCALR::COMPLETE => false,
ADCALR::CALIBRATION => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> ADCALR {
match value {
false => ADCALR::COMPLETE,
true => ADCALR::CALIBRATION,
}
}
#[doc = "Checks if the value of the field is `COMPLETE`"]
#[inline(always)]
pub fn is_complete(&self) -> bool {
*self == ADCALR::COMPLETE
}
#[doc = "Checks if the value of the field is `CALIBRATION`"]
#[inline(always)]
pub fn is_calibration(&self) -> bool {
*self == ADCALR::CALIBRATION
}
}
#[doc = "Values that can be written to the field `ADCAL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADCALW {
#[doc = "Calibration complete"]
COMPLETE,
#[doc = "Start the calibration of the ADC"]
CALIBRATION,
}
impl ADCALW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
ADCALW::COMPLETE => false,
ADCALW::CALIBRATION => true,
}
}
}
#[doc = r"Proxy"]
pub struct _ADCALW<'a> {
w: &'a mut W,
}
impl<'a> _ADCALW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADCALW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Calibration complete"]
#[inline(always)]
pub fn complete(self) -> &'a mut W {
self.variant(ADCALW::COMPLETE)
}
#[doc = "Start the calibration of the ADC"]
#[inline(always)]
pub fn calibration(self) -> &'a mut W {
self.variant(ADCALW::CALIBRATION)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 31);
self.w.bits |= ((value as u32) & 0x01) << 31;
self.w
}
}
#[doc = "Possible values of the field `ADCALDIF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADCALDIFR {
#[doc = "Calibration for single-ended mode"]
SINGLEENDED,
#[doc = "Calibration for differential mode"]
DIFFERENTIAL,
}
impl ADCALDIFR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
ADCALDIFR::SINGLEENDED => false,
ADCALDIFR::DIFFERENTIAL => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> ADCALDIFR {
match value {
false => ADCALDIFR::SINGLEENDED,
true => ADCALDIFR::DIFFERENTIAL,
}
}
#[doc = "Checks if the value of the field is `SINGLEENDED`"]
#[inline(always)]
pub fn is_single_ended(&self) -> bool {
*self == ADCALDIFR::SINGLEENDED
}
#[doc = "Checks if the value of the field is `DIFFERENTIAL`"]
#[inline(always)]
pub fn is_differential(&self) -> bool {
*self == ADCALDIFR::DIFFERENTIAL
}
}
#[doc = "Values that can be written to the field `ADCALDIF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADCALDIFW {
#[doc = "Calibration for single-ended mode"]
SINGLEENDED,
#[doc = "Calibration for differential mode"]
DIFFERENTIAL,
}
impl ADCALDIFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
ADCALDIFW::SINGLEENDED => false,
ADCALDIFW::DIFFERENTIAL => true,
}
}
}
#[doc = r"Proxy"]
pub struct _ADCALDIFW<'a> {
w: &'a mut W,
}
impl<'a> _ADCALDIFW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADCALDIFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Calibration for single-ended mode"]
#[inline(always)]
pub fn single_ended(self) -> &'a mut W {
self.variant(ADCALDIFW::SINGLEENDED)
}
#[doc = "Calibration for differential mode"]
#[inline(always)]
pub fn differential(self) -> &'a mut W {
self.variant(ADCALDIFW::DIFFERENTIAL)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 30);
self.w.bits |= ((value as u32) & 0x01) << 30;
self.w
}
}
#[doc = "Possible values of the field `DEEPPWD`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DEEPPWDR {
#[doc = "ADC not in deep power down"]
POWERUP,
#[doc = "ADC in deep power down"]
POWERDOWN,
}
impl DEEPPWDR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
DEEPPWDR::POWERUP => false,
DEEPPWDR::POWERDOWN => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> DEEPPWDR {
match value {
false => DEEPPWDR::POWERUP,
true => DEEPPWDR::POWERDOWN,
}
}
#[doc = "Checks if the value of the field is `POWERUP`"]
#[inline(always)]
pub fn is_power_up(&self) -> bool {
*self == DEEPPWDR::POWERUP
}
#[doc = "Checks if the value of the field is `POWERDOWN`"]
#[inline(always)]
pub fn is_power_down(&self) -> bool {
*self == DEEPPWDR::POWERDOWN
}
}
#[doc = "Values that can be written to the field `DEEPPWD`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DEEPPWDW {
#[doc = "ADC not in deep power down"]
POWERUP,
#[doc = "ADC in deep power down"]
POWERDOWN,
}
impl DEEPPWDW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
DEEPPWDW::POWERUP => false,
DEEPPWDW::POWERDOWN => true,
}
}
}
#[doc = r"Proxy"]
pub struct _DEEPPWDW<'a> {
w: &'a mut W,
}
impl<'a> _DEEPPWDW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DEEPPWDW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "ADC not in deep power down"]
#[inline(always)]
pub fn power_up(self) -> &'a mut W {
self.variant(DEEPPWDW::POWERUP)
}
#[doc = "ADC in deep power down"]
#[inline(always)]
pub fn power_down(self) -> &'a mut W {
self.variant(DEEPPWDW::POWERDOWN)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 29);
self.w.bits |= ((value as u32) & 0x01) << 29;
self.w
}
}
#[doc = "Possible values of the field `ADVREGEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADVREGENR {
#[doc = "ADC voltage regulator disabled"]
DISABLED,
#[doc = "ADC voltage regulator enabled"]
ENABLED,
}
impl ADVREGENR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
ADVREGENR::DISABLED => false,
ADVREGENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> ADVREGENR {
match value {
false => ADVREGENR::DISABLED,
true => ADVREGENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ADVREGENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ADVREGENR::ENABLED
}
}
#[doc = "Values that can be written to the field `ADVREGEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADVREGENW {
#[doc = "ADC voltage regulator disabled"]
DISABLED,
#[doc = "ADC voltage regulator enabled"]
ENABLED,
}
impl ADVREGENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
ADVREGENW::DISABLED => false,
ADVREGENW::ENABLED => true,
}
}
}
#[doc = r"Proxy"]
pub struct _ADVREGENW<'a> {
w: &'a mut W,
}
impl<'a> _ADVREGENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADVREGENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "ADC voltage regulator disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ADVREGENW::DISABLED)
}
#[doc = "ADC voltage regulator enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ADVREGENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 28);
self.w.bits |= ((value as u32) & 0x01) << 28;
self.w
}
}
#[doc = "Possible values of the field `LINCALRDYW6`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum LINCALRDYW6R {
#[doc = "LINCALFACT Word Read"]
RESET,
#[doc = "LINCALFACT Word Write"]
SET,
}
impl LINCALRDYW6R {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
LINCALRDYW6R::RESET => false,
LINCALRDYW6R::SET => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> LINCALRDYW6R {
match value {
false => LINCALRDYW6R::RESET,
true => LINCALRDYW6R::SET,
}
}
#[doc = "Checks if the value of the field is `RESET`"]
#[inline(always)]
pub fn is_reset(&self) -> bool {
*self == LINCALRDYW6R::RESET
}
#[doc = "Checks if the value of the field is `SET`"]
#[inline(always)]
pub fn is_set(&self) -> bool {
*self == LINCALRDYW6R::SET
}
}
#[doc = "Values that can be written to the field `LINCALRDYW6`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum LINCALRDYW6W {
#[doc = "LINCALFACT Word Read"]
RESET,
#[doc = "LINCALFACT Word Write"]
SET,
}
impl LINCALRDYW6W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
LINCALRDYW6W::RESET => false,
LINCALRDYW6W::SET => true,
}
}
}
#[doc = r"Proxy"]
pub struct _LINCALRDYW6W<'a> {
w: &'a mut W,
}
impl<'a> _LINCALRDYW6W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LINCALRDYW6W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "LINCALFACT Word Read"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(LINCALRDYW6W::RESET)
}
#[doc = "LINCALFACT Word Write"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(LINCALRDYW6W::SET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 27);
self.w.bits |= ((value as u32) & 0x01) << 27;
self.w
}
}
#[doc = "Possible values of the field `LINCALRDYW5`"]
pub type LINCALRDYW5R = LINCALRDYW6R;
#[doc = "Values that can be written to the field `LINCALRDYW5`"]
pub type LINCALRDYW5W = LINCALRDYW6W;
#[doc = r"Proxy"]
pub struct _LINCALRDYW5W<'a> {
w: &'a mut W,
}
impl<'a> _LINCALRDYW5W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LINCALRDYW5W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "LINCALFACT Word Read"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(LINCALRDYW6W::RESET)
}
#[doc = "LINCALFACT Word Write"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(LINCALRDYW6W::SET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 26);
self.w.bits |= ((value as u32) & 0x01) << 26;
self.w
}
}
#[doc = "Possible values of the field `LINCALRDYW4`"]
pub type LINCALRDYW4R = LINCALRDYW6R;
#[doc = "Values that can be written to the field `LINCALRDYW4`"]
pub type LINCALRDYW4W = LINCALRDYW6W;
#[doc = r"Proxy"]
pub struct _LINCALRDYW4W<'a> {
w: &'a mut W,
}
impl<'a> _LINCALRDYW4W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LINCALRDYW4W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "LINCALFACT Word Read"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(LINCALRDYW6W::RESET)
}
#[doc = "LINCALFACT Word Write"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(LINCALRDYW6W::SET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 25);
self.w.bits |= ((value as u32) & 0x01) << 25;
self.w
}
}
#[doc = "Possible values of the field `LINCALRDYW3`"]
pub type LINCALRDYW3R = LINCALRDYW6R;
#[doc = "Values that can be written to the field `LINCALRDYW3`"]
pub type LINCALRDYW3W = LINCALRDYW6W;
#[doc = r"Proxy"]
pub struct _LINCALRDYW3W<'a> {
w: &'a mut W,
}
impl<'a> _LINCALRDYW3W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LINCALRDYW3W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "LINCALFACT Word Read"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(LINCALRDYW6W::RESET)
}
#[doc = "LINCALFACT Word Write"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(LINCALRDYW6W::SET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 24);
self.w.bits |= ((value as u32) & 0x01) << 24;
self.w
}
}
#[doc = "Possible values of the field `LINCALRDYW2`"]
pub type LINCALRDYW2R = LINCALRDYW6R;
#[doc = "Values that can be written to the field `LINCALRDYW2`"]
pub type LINCALRDYW2W = LINCALRDYW6W;
#[doc = r"Proxy"]
pub struct _LINCALRDYW2W<'a> {
w: &'a mut W,
}
impl<'a> _LINCALRDYW2W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LINCALRDYW2W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "LINCALFACT Word Read"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(LINCALRDYW6W::RESET)
}
#[doc = "LINCALFACT Word Write"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(LINCALRDYW6W::SET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 23);
self.w.bits |= ((value as u32) & 0x01) << 23;
self.w
}
}
#[doc = "Possible values of the field `LINCALRDYW1`"]
pub type LINCALRDYW1R = LINCALRDYW6R;
#[doc = "Values that can be written to the field `LINCALRDYW1`"]
pub type LINCALRDYW1W = LINCALRDYW6W;
#[doc = r"Proxy"]
pub struct _LINCALRDYW1W<'a> {
w: &'a mut W,
}
impl<'a> _LINCALRDYW1W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LINCALRDYW1W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "LINCALFACT Word Read"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(LINCALRDYW6W::RESET)
}
#[doc = "LINCALFACT Word Write"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(LINCALRDYW6W::SET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 22);
self.w.bits |= ((value as u32) & 0x01) << 22;
self.w
}
}
#[doc = "Possible values of the field `ADCALLIN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADCALLINR {
#[doc = "ADC calibration without linearaity calibration"]
NOLINEARITY,
#[doc = "ADC calibration with linearaity calibration"]
LINEARITY,
}
impl ADCALLINR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
ADCALLINR::NOLINEARITY => false,
ADCALLINR::LINEARITY => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> ADCALLINR {
match value {
false => ADCALLINR::NOLINEARITY,
true => ADCALLINR::LINEARITY,
}
}
#[doc = "Checks if the value of the field is `NOLINEARITY`"]
#[inline(always)]
pub fn is_no_linearity(&self) -> bool {
*self == ADCALLINR::NOLINEARITY
}
#[doc = "Checks if the value of the field is `LINEARITY`"]
#[inline(always)]
pub fn is_linearity(&self) -> bool {
*self == ADCALLINR::LINEARITY
}
}
#[doc = "Values that can be written to the field `ADCALLIN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADCALLINW {
#[doc = "ADC calibration without linearaity calibration"]
NOLINEARITY,
#[doc = "ADC calibration with linearaity calibration"]
LINEARITY,
}
impl ADCALLINW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
ADCALLINW::NOLINEARITY => false,
ADCALLINW::LINEARITY => true,
}
}
}
#[doc = r"Proxy"]
pub struct _ADCALLINW<'a> {
w: &'a mut W,
}
impl<'a> _ADCALLINW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADCALLINW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "ADC calibration without linearaity calibration"]
#[inline(always)]
pub fn no_linearity(self) -> &'a mut W {
self.variant(ADCALLINW::NOLINEARITY)
}
#[doc = "ADC calibration with linearaity calibration"]
#[inline(always)]
pub fn linearity(self) -> &'a mut W {
self.variant(ADCALLINW::LINEARITY)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 16);
self.w.bits |= ((value as u32) & 0x01) << 16;
self.w
}
}
#[doc = "Possible values of the field `BOOST`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BOOSTR {
#[doc = "Boost mode used when ADC clock \u{2264} 6.25 MHz"]
LT6_25,
#[doc = "Boost mode used when 6.25 MHz < ADC clock \u{2264} 12.5 MHz"]
LT12_5,
#[doc = "Boost mode used when 12.5 MHz < ADC clock \u{2264} 25.0 MHz"]
LT25,
#[doc = "Boost mode used when 25.0 MHz < ADC clock \u{2264} 50.0 MHz"]
LT50,
}
impl BOOSTR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
BOOSTR::LT6_25 => 0,
BOOSTR::LT12_5 => 0x01,
BOOSTR::LT25 => 0x02,
BOOSTR::LT50 => 0x03,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> BOOSTR {
match value {
0 => BOOSTR::LT6_25,
1 => BOOSTR::LT12_5,
2 => BOOSTR::LT25,
3 => BOOSTR::LT50,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `LT6_25`"]
#[inline(always)]
pub fn is_lt6_25(&self) -> bool {
*self == BOOSTR::LT6_25
}
#[doc = "Checks if the value of the field is `LT12_5`"]
#[inline(always)]
pub fn is_lt12_5(&self) -> bool {
*self == BOOSTR::LT12_5
}
#[doc = "Checks if the value of the field is `LT25`"]
#[inline(always)]
pub fn is_lt25(&self) -> bool {
*self == BOOSTR::LT25
}
#[doc = "Checks if the value of the field is `LT50`"]
#[inline(always)]
pub fn is_lt50(&self) -> bool {
*self == BOOSTR::LT50
}
}
#[doc = "Values that can be written to the field `BOOST`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BOOSTW {
#[doc = "Boost mode used when ADC clock \u{2264} 6.25 MHz"]
LT6_25,
#[doc = "Boost mode used when 6.25 MHz < ADC clock \u{2264} 12.5 MHz"]
LT12_5,
#[doc = "Boost mode used when 12.5 MHz < ADC clock \u{2264} 25.0 MHz"]
LT25,
#[doc = "Boost mode used when 25.0 MHz < ADC clock \u{2264} 50.0 MHz"]
LT50,
}
impl BOOSTW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
BOOSTW::LT6_25 => 0,
BOOSTW::LT12_5 => 1,
BOOSTW::LT25 => 2,
BOOSTW::LT50 => 3,
}
}
}
#[doc = r"Proxy"]
pub struct _BOOSTW<'a> {
w: &'a mut W,
}
impl<'a> _BOOSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: BOOSTW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Boost mode used when ADC clock \u{2264} 6.25 MHz"]
#[inline(always)]
pub fn lt6_25(self) -> &'a mut W {
self.variant(BOOSTW::LT6_25)
}
#[doc = "Boost mode used when 6.25 MHz < ADC clock \u{2264} 12.5 MHz"]
#[inline(always)]
pub fn lt12_5(self) -> &'a mut W {
self.variant(BOOSTW::LT12_5)
}
#[doc = "Boost mode used when 12.5 MHz < ADC clock \u{2264} 25.0 MHz"]
#[inline(always)]
pub fn lt25(self) -> &'a mut W {
self.variant(BOOSTW::LT25)
}
#[doc = "Boost mode used when 25.0 MHz < ADC clock \u{2264} 50.0 MHz"]
#[inline(always)]
pub fn lt50(self) -> &'a mut W {
self.variant(BOOSTW::LT50)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x03 << 8);
self.w.bits |= ((value as u32) & 0x03) << 8;
self.w
}
}
#[doc = "Possible values of the field `JADSTP`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum JADSTPR {
#[doc = "Stop conversion of channel"]
STOP,
#[doc = r"Reserved"]
_Reserved(bool),
}
impl JADSTPR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
JADSTPR::STOP => true,
JADSTPR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> JADSTPR {
match value {
true => JADSTPR::STOP,
i => JADSTPR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `STOP`"]
#[inline(always)]
pub fn is_stop(&self) -> bool {
*self == JADSTPR::STOP
}
}
#[doc = "Values that can be written to the field `JADSTP`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum JADSTPW {
#[doc = "Stop conversion of channel"]
STOP,
}
impl JADSTPW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
JADSTPW::STOP => true,
}
}
}
#[doc = r"Proxy"]
pub struct _JADSTPW<'a> {
w: &'a mut W,
}
impl<'a> _JADSTPW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: JADSTPW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Stop conversion of channel"]
#[inline(always)]
pub fn stop(self) -> &'a mut W {
self.variant(JADSTPW::STOP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 5);
self.w.bits |= ((value as u32) & 0x01) << 5;
self.w
}
}
#[doc = "Possible values of the field `ADSTP`"]
pub type ADSTPR = JADSTPR;
#[doc = "Values that can be written to the field `ADSTP`"]
pub type ADSTPW = JADSTPW;
#[doc = r"Proxy"]
pub struct _ADSTPW<'a> {
w: &'a mut W,
}
impl<'a> _ADSTPW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADSTPW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Stop conversion of channel"]
#[inline(always)]
pub fn stop(self) -> &'a mut W {
self.variant(JADSTPW::STOP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 4);
self.w.bits |= ((value as u32) & 0x01) << 4;
self.w
}
}
#[doc = "Possible values of the field `JADSTART`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum JADSTARTR {
#[doc = "Starts conversion of channel"]
START,
#[doc = r"Reserved"]
_Reserved(bool),
}
impl JADSTARTR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
JADSTARTR::START => true,
JADSTARTR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> JADSTARTR {
match value {
true => JADSTARTR::START,
i => JADSTARTR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `START`"]
#[inline(always)]
pub fn is_start(&self) -> bool {
*self == JADSTARTR::START
}
}
#[doc = "Values that can be written to the field `JADSTART`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum JADSTARTW {
#[doc = "Starts conversion of channel"]
START,
}
impl JADSTARTW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
JADSTARTW::START => true,
}
}
}
#[doc = r"Proxy"]
pub struct _JADSTARTW<'a> {
w: &'a mut W,
}
impl<'a> _JADSTARTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: JADSTARTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Starts conversion of channel"]
#[inline(always)]
pub fn start(self) -> &'a mut W {
self.variant(JADSTARTW::START)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 3);
self.w.bits |= ((value as u32) & 0x01) << 3;
self.w
}
}
#[doc = "Possible values of the field `ADSTART`"]
pub type ADSTARTR = JADSTARTR;
#[doc = "Values that can be written to the field `ADSTART`"]
pub type ADSTARTW = JADSTARTW;
#[doc = r"Proxy"]
pub struct _ADSTARTW<'a> {
w: &'a mut W,
}
impl<'a> _ADSTARTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADSTARTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Starts conversion of channel"]
#[inline(always)]
pub fn start(self) -> &'a mut W {
self.variant(JADSTARTW::START)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 2);
self.w.bits |= ((value as u32) & 0x01) << 2;
self.w
}
}
#[doc = "Possible values of the field `ADDIS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADDISR {
#[doc = "Disable ADC conversion and go to power down mode"]
DISABLE,
#[doc = r"Reserved"]
_Reserved(bool),
}
impl ADDISR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
ADDISR::DISABLE => false,
ADDISR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> ADDISR {
match value {
false => ADDISR::DISABLE,
i => ADDISR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline(always)]
pub fn is_disable(&self) -> bool {
*self == ADDISR::DISABLE
}
}
#[doc = "Values that can be written to the field `ADDIS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADDISW {
#[doc = "Disable ADC conversion and go to power down mode"]
DISABLE,
}
impl ADDISW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
ADDISW::DISABLE => false,
}
}
}
#[doc = r"Proxy"]
pub struct _ADDISW<'a> {
w: &'a mut W,
}
impl<'a> _ADDISW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADDISW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable ADC conversion and go to power down mode"]
#[inline(always)]
pub fn disable(self) -> &'a mut W {
self.variant(ADDISW::DISABLE)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 1);
self.w.bits |= ((value as u32) & 0x01) << 1;
self.w
}
}
#[doc = "Possible values of the field `ADEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADENR {
#[doc = "Enable ADC"]
ENABLE,
#[doc = r"Reserved"]
_Reserved(bool),
}
impl ADENR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
ADENR::ENABLE => true,
ADENR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> ADENR {
match value {
true => ADENR::ENABLE,
i => ADENR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline(always)]
pub fn is_enable(&self) -> bool {
*self == ADENR::ENABLE
}
}
#[doc = "Values that can be written to the field `ADEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADENW {
#[doc = "Enable ADC"]
ENABLE,
}
impl ADENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
ADENW::ENABLE => true,
}
}
}
#[doc = r"Proxy"]
pub struct _ADENW<'a> {
w: &'a mut W,
}
impl<'a> _ADENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Enable ADC"]
#[inline(always)]
pub fn enable(self) -> &'a mut W {
self.variant(ADENW::ENABLE)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 0);
self.w.bits |= ((value as u32) & 0x01) << 0;
self.w
}
}
impl R {
#[doc = r"Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 31 - ADC calibration"]
#[inline(always)]
pub fn adcal(&self) -> ADCALR {
ADCALR::_from(((self.bits >> 31) & 0x01) != 0)
}
#[doc = "Bit 30 - ADC differential mode for calibration"]
#[inline(always)]
pub fn adcaldif(&self) -> ADCALDIFR {
ADCALDIFR::_from(((self.bits >> 30) & 0x01) != 0)
}
#[doc = "Bit 29 - ADC deep power down enable"]
#[inline(always)]
pub fn deeppwd(&self) -> DEEPPWDR {
DEEPPWDR::_from(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 28 - ADC voltage regulator enable"]
#[inline(always)]
pub fn advregen(&self) -> ADVREGENR {
ADVREGENR::_from(((self.bits >> 28) & 0x01) != 0)
}
#[doc = "Bit 27 - Linearity calibration ready Word 6"]
#[inline(always)]
pub fn lincalrdyw6(&self) -> LINCALRDYW6R {
LINCALRDYW6R::_from(((self.bits >> 27) & 0x01) != 0)
}
#[doc = "Bit 26 - Linearity calibration ready Word 5"]
#[inline(always)]
pub fn lincalrdyw5(&self) -> LINCALRDYW5R {
LINCALRDYW5R::_from(((self.bits >> 26) & 0x01) != 0)
}
#[doc = "Bit 25 - Linearity calibration ready Word 4"]
#[inline(always)]
pub fn lincalrdyw4(&self) -> LINCALRDYW4R {
LINCALRDYW4R::_from(((self.bits >> 25) & 0x01) != 0)
}
#[doc = "Bit 24 - Linearity calibration ready Word 3"]
#[inline(always)]
pub fn lincalrdyw3(&self) -> LINCALRDYW3R {
LINCALRDYW3R::_from(((self.bits >> 24) & 0x01) != 0)
}
#[doc = "Bit 23 - Linearity calibration ready Word 2"]
#[inline(always)]
pub fn lincalrdyw2(&self) -> LINCALRDYW2R {
LINCALRDYW2R::_from(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 22 - Linearity calibration ready Word 1"]
#[inline(always)]
pub fn lincalrdyw1(&self) -> LINCALRDYW1R {
LINCALRDYW1R::_from(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 16 - Linearity calibration"]
#[inline(always)]
pub fn adcallin(&self) -> ADCALLINR {
ADCALLINR::_from(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bits 8:9 - Boost mode control"]
#[inline(always)]
pub fn boost(&self) -> BOOSTR {
BOOSTR::_from(((self.bits >> 8) & 0x03) as u8)
}
#[doc = "Bit 5 - ADC group injected conversion stop"]
#[inline(always)]
pub fn jadstp(&self) -> JADSTPR {
JADSTPR::_from(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 4 - ADC group regular conversion stop"]
#[inline(always)]
pub fn adstp(&self) -> ADSTPR {
ADSTPR::_from(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 3 - ADC group injected conversion start"]
#[inline(always)]
pub fn jadstart(&self) -> JADSTARTR {
JADSTARTR::_from(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 2 - ADC group regular conversion start"]
#[inline(always)]
pub fn adstart(&self) -> ADSTARTR {
ADSTARTR::_from(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - ADC disable"]
#[inline(always)]
pub fn addis(&self) -> ADDISR {
ADDISR::_from(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - ADC enable"]
#[inline(always)]
pub fn aden(&self) -> ADENR {
ADENR::_from(((self.bits >> 0) & 0x01) != 0)
}
}
impl W {
#[doc = r"Writes raw bits to the register"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 31 - ADC calibration"]
#[inline(always)]
pub fn adcal(&mut self) -> _ADCALW {
_ADCALW { w: self }
}
#[doc = "Bit 30 - ADC differential mode for calibration"]
#[inline(always)]
pub fn adcaldif(&mut self) -> _ADCALDIFW {
_ADCALDIFW { w: self }
}
#[doc = "Bit 29 - ADC deep power down enable"]
#[inline(always)]
pub fn deeppwd(&mut self) -> _DEEPPWDW {
_DEEPPWDW { w: self }
}
#[doc = "Bit 28 - ADC voltage regulator enable"]
#[inline(always)]
pub fn advregen(&mut self) -> _ADVREGENW {
_ADVREGENW { w: self }
}
#[doc = "Bit 27 - Linearity calibration ready Word 6"]
#[inline(always)]
pub fn lincalrdyw6(&mut self) -> _LINCALRDYW6W {
_LINCALRDYW6W { w: self }
}
#[doc = "Bit 26 - Linearity calibration ready Word 5"]
#[inline(always)]
pub fn lincalrdyw5(&mut self) -> _LINCALRDYW5W {
_LINCALRDYW5W { w: self }
}
#[doc = "Bit 25 - Linearity calibration ready Word 4"]
#[inline(always)]
pub fn lincalrdyw4(&mut self) -> _LINCALRDYW4W {
_LINCALRDYW4W { w: self }
}
#[doc = "Bit 24 - Linearity calibration ready Word 3"]
#[inline(always)]
pub fn lincalrdyw3(&mut self) -> _LINCALRDYW3W {
_LINCALRDYW3W { w: self }
}
#[doc = "Bit 23 - Linearity calibration ready Word 2"]
#[inline(always)]
pub fn lincalrdyw2(&mut self) -> _LINCALRDYW2W {
_LINCALRDYW2W { w: self }
}
#[doc = "Bit 22 - Linearity calibration ready Word 1"]
#[inline(always)]
pub fn lincalrdyw1(&mut self) -> _LINCALRDYW1W {
_LINCALRDYW1W { w: self }
}
#[doc = "Bit 16 - Linearity calibration"]
#[inline(always)]
pub fn adcallin(&mut self) -> _ADCALLINW {
_ADCALLINW { w: self }
}
#[doc = "Bits 8:9 - Boost mode control"]
#[inline(always)]
pub fn boost(&mut self) -> _BOOSTW {
_BOOSTW { w: self }
}
#[doc = "Bit 5 - ADC group injected conversion stop"]
#[inline(always)]
pub fn jadstp(&mut self) -> _JADSTPW {
_JADSTPW { w: self }
}
#[doc = "Bit 4 - ADC group regular conversion stop"]
#[inline(always)]
pub fn adstp(&mut self) -> _ADSTPW {
_ADSTPW { w: self }
}
#[doc = "Bit 3 - ADC group injected conversion start"]
#[inline(always)]
pub fn jadstart(&mut self) -> _JADSTARTW {
_JADSTARTW { w: self }
}
#[doc = "Bit 2 - ADC group regular conversion start"]
#[inline(always)]
pub fn adstart(&mut self) -> _ADSTARTW {
_ADSTARTW { w: self }
}
#[doc = "Bit 1 - ADC disable"]
#[inline(always)]
pub fn addis(&mut self) -> _ADDISW {
_ADDISW { w: self }
}
#[doc = "Bit 0 - ADC enable"]
#[inline(always)]
pub fn aden(&mut self) -> _ADENW {
_ADENW { w: self }
}
}