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#[doc = r"Value read from the register"] pub struct R { bits: u32, } #[doc = r"Value to write to the register"] pub struct W { bits: u32, } impl super::PLL3DIVR { #[doc = r"Modifies the contents of the register"] #[inline(always)] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); self.register.set(f(&R { bits }, &mut W { bits }).bits); } #[doc = r"Reads the contents of the register"] #[inline(always)] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r"Writes to the register"] #[inline(always)] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { self.register.set( f(&mut W { bits: Self::reset_value(), }) .bits, ); } #[doc = r"Reset value of the register"] #[inline(always)] pub const fn reset_value() -> u32 { 0x0101_0280 } #[doc = r"Writes the reset value to the register"] #[inline(always)] pub fn reset(&self) { self.register.set(Self::reset_value()) } } #[doc = r"Value of the field"] pub struct DIVN3R { bits: u16, } impl DIVN3R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u16 { self.bits } } #[doc = r"Proxy"] pub struct _DIVN3W<'a> { w: &'a mut W, } impl<'a> _DIVN3W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits &= !(0x01ff << 0); self.w.bits |= ((value as u32) & 0x01ff) << 0; self.w } } #[doc = r"Value of the field"] pub struct DIVP3R { bits: u8, } impl DIVP3R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _DIVP3W<'a> { w: &'a mut W, } impl<'a> _DIVP3W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0x7f << 9); self.w.bits |= ((value as u32) & 0x7f) << 9; self.w } } #[doc = r"Value of the field"] pub struct DIVQ3R { bits: u8, } impl DIVQ3R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _DIVQ3W<'a> { w: &'a mut W, } impl<'a> _DIVQ3W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0x7f << 16); self.w.bits |= ((value as u32) & 0x7f) << 16; self.w } } #[doc = r"Value of the field"] pub struct DIVR3R { bits: u8, } impl DIVR3R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _DIVR3W<'a> { w: &'a mut W, } impl<'a> _DIVR3W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0x7f << 24); self.w.bits |= ((value as u32) & 0x7f) << 24; self.w } } impl R { #[doc = r"Value of the register as raw bits"] #[inline(always)] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bits 0:8 - Multiplication factor for PLL1 VCO"] #[inline(always)] pub fn divn3(&self) -> DIVN3R { let bits = ((self.bits >> 0) & 0x01ff) as u16; DIVN3R { bits } } #[doc = "Bits 9:15 - PLL DIVP division factor"] #[inline(always)] pub fn divp3(&self) -> DIVP3R { let bits = ((self.bits >> 9) & 0x7f) as u8; DIVP3R { bits } } #[doc = "Bits 16:22 - PLL DIVQ division factor"] #[inline(always)] pub fn divq3(&self) -> DIVQ3R { let bits = ((self.bits >> 16) & 0x7f) as u8; DIVQ3R { bits } } #[doc = "Bits 24:30 - PLL DIVR division factor"] #[inline(always)] pub fn divr3(&self) -> DIVR3R { let bits = ((self.bits >> 24) & 0x7f) as u8; DIVR3R { bits } } } impl W { #[doc = r"Writes raw bits to the register"] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bits 0:8 - Multiplication factor for PLL1 VCO"] #[inline(always)] pub fn divn3(&mut self) -> _DIVN3W { _DIVN3W { w: self } } #[doc = "Bits 9:15 - PLL DIVP division factor"] #[inline(always)] pub fn divp3(&mut self) -> _DIVP3W { _DIVP3W { w: self } } #[doc = "Bits 16:22 - PLL DIVQ division factor"] #[inline(always)] pub fn divq3(&mut self) -> _DIVQ3W { _DIVQ3W { w: self } } #[doc = "Bits 24:30 - PLL DIVR division factor"] #[inline(always)] pub fn divr3(&mut self) -> _DIVR3W { _DIVR3W { w: self } } }