#[doc = r"Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r"Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::APB1LRSTR {
#[doc = r"Modifies the contents of the register"]
#[inline(always)]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
self.register.set(f(&R { bits }, &mut W { bits }).bits);
}
#[doc = r"Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r"Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
self.register.set(
f(&mut W {
bits: Self::reset_value(),
})
.bits,
);
}
#[doc = r"Reset value of the register"]
#[inline(always)]
pub const fn reset_value() -> u32 {
0
}
#[doc = r"Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.register.set(Self::reset_value())
}
}
#[doc = "Possible values of the field `TIM2RST`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIM2RSTR {
#[doc = "Reset the selected module"]
RESET,
#[doc = r"Reserved"]
_Reserved(bool),
}
impl TIM2RSTR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
TIM2RSTR::RESET => true,
TIM2RSTR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> TIM2RSTR {
match value {
true => TIM2RSTR::RESET,
i => TIM2RSTR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `RESET`"]
#[inline(always)]
pub fn is_reset(&self) -> bool {
*self == TIM2RSTR::RESET
}
}
#[doc = "Values that can be written to the field `TIM2RST`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIM2RSTW {
#[doc = "Reset the selected module"]
RESET,
}
impl TIM2RSTW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
TIM2RSTW::RESET => true,
}
}
}
#[doc = r"Proxy"]
pub struct _TIM2RSTW<'a> {
w: &'a mut W,
}
impl<'a> _TIM2RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM2RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 0);
self.w.bits |= ((value as u32) & 0x01) << 0;
self.w
}
}
#[doc = "Possible values of the field `TIM3RST`"]
pub type TIM3RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `TIM3RST`"]
pub type TIM3RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _TIM3RSTW<'a> {
w: &'a mut W,
}
impl<'a> _TIM3RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM3RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 1);
self.w.bits |= ((value as u32) & 0x01) << 1;
self.w
}
}
#[doc = "Possible values of the field `TIM4RST`"]
pub type TIM4RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `TIM4RST`"]
pub type TIM4RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _TIM4RSTW<'a> {
w: &'a mut W,
}
impl<'a> _TIM4RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM4RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 2);
self.w.bits |= ((value as u32) & 0x01) << 2;
self.w
}
}
#[doc = "Possible values of the field `TIM5RST`"]
pub type TIM5RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `TIM5RST`"]
pub type TIM5RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _TIM5RSTW<'a> {
w: &'a mut W,
}
impl<'a> _TIM5RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM5RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 3);
self.w.bits |= ((value as u32) & 0x01) << 3;
self.w
}
}
#[doc = "Possible values of the field `TIM6RST`"]
pub type TIM6RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `TIM6RST`"]
pub type TIM6RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _TIM6RSTW<'a> {
w: &'a mut W,
}
impl<'a> _TIM6RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM6RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 4);
self.w.bits |= ((value as u32) & 0x01) << 4;
self.w
}
}
#[doc = "Possible values of the field `TIM7RST`"]
pub type TIM7RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `TIM7RST`"]
pub type TIM7RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _TIM7RSTW<'a> {
w: &'a mut W,
}
impl<'a> _TIM7RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM7RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 5);
self.w.bits |= ((value as u32) & 0x01) << 5;
self.w
}
}
#[doc = "Possible values of the field `TIM12RST`"]
pub type TIM12RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `TIM12RST`"]
pub type TIM12RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _TIM12RSTW<'a> {
w: &'a mut W,
}
impl<'a> _TIM12RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM12RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 6);
self.w.bits |= ((value as u32) & 0x01) << 6;
self.w
}
}
#[doc = "Possible values of the field `TIM13RST`"]
pub type TIM13RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `TIM13RST`"]
pub type TIM13RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _TIM13RSTW<'a> {
w: &'a mut W,
}
impl<'a> _TIM13RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM13RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 7);
self.w.bits |= ((value as u32) & 0x01) << 7;
self.w
}
}
#[doc = "Possible values of the field `TIM14RST`"]
pub type TIM14RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `TIM14RST`"]
pub type TIM14RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _TIM14RSTW<'a> {
w: &'a mut W,
}
impl<'a> _TIM14RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM14RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 8);
self.w.bits |= ((value as u32) & 0x01) << 8;
self.w
}
}
#[doc = "Possible values of the field `LPTIM1RST`"]
pub type LPTIM1RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `LPTIM1RST`"]
pub type LPTIM1RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _LPTIM1RSTW<'a> {
w: &'a mut W,
}
impl<'a> _LPTIM1RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LPTIM1RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 9);
self.w.bits |= ((value as u32) & 0x01) << 9;
self.w
}
}
#[doc = "Possible values of the field `SPI2RST`"]
pub type SPI2RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `SPI2RST`"]
pub type SPI2RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _SPI2RSTW<'a> {
w: &'a mut W,
}
impl<'a> _SPI2RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI2RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 14);
self.w.bits |= ((value as u32) & 0x01) << 14;
self.w
}
}
#[doc = "Possible values of the field `SPI3RST`"]
pub type SPI3RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `SPI3RST`"]
pub type SPI3RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _SPI3RSTW<'a> {
w: &'a mut W,
}
impl<'a> _SPI3RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI3RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 15);
self.w.bits |= ((value as u32) & 0x01) << 15;
self.w
}
}
#[doc = "Possible values of the field `SPDIFRXRST`"]
pub type SPDIFRXRSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `SPDIFRXRST`"]
pub type SPDIFRXRSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _SPDIFRXRSTW<'a> {
w: &'a mut W,
}
impl<'a> _SPDIFRXRSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPDIFRXRSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 16);
self.w.bits |= ((value as u32) & 0x01) << 16;
self.w
}
}
#[doc = "Possible values of the field `USART2RST`"]
pub type USART2RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `USART2RST`"]
pub type USART2RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _USART2RSTW<'a> {
w: &'a mut W,
}
impl<'a> _USART2RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART2RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 17);
self.w.bits |= ((value as u32) & 0x01) << 17;
self.w
}
}
#[doc = "Possible values of the field `USART3RST`"]
pub type USART3RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `USART3RST`"]
pub type USART3RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _USART3RSTW<'a> {
w: &'a mut W,
}
impl<'a> _USART3RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART3RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 18);
self.w.bits |= ((value as u32) & 0x01) << 18;
self.w
}
}
#[doc = "Possible values of the field `UART4RST`"]
pub type UART4RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `UART4RST`"]
pub type UART4RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _UART4RSTW<'a> {
w: &'a mut W,
}
impl<'a> _UART4RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART4RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 19);
self.w.bits |= ((value as u32) & 0x01) << 19;
self.w
}
}
#[doc = "Possible values of the field `UART5RST`"]
pub type UART5RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `UART5RST`"]
pub type UART5RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _UART5RSTW<'a> {
w: &'a mut W,
}
impl<'a> _UART5RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART5RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 20);
self.w.bits |= ((value as u32) & 0x01) << 20;
self.w
}
}
#[doc = "Possible values of the field `I2C1RST`"]
pub type I2C1RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `I2C1RST`"]
pub type I2C1RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _I2C1RSTW<'a> {
w: &'a mut W,
}
impl<'a> _I2C1RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C1RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 21);
self.w.bits |= ((value as u32) & 0x01) << 21;
self.w
}
}
#[doc = "Possible values of the field `I2C2RST`"]
pub type I2C2RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `I2C2RST`"]
pub type I2C2RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _I2C2RSTW<'a> {
w: &'a mut W,
}
impl<'a> _I2C2RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C2RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 22);
self.w.bits |= ((value as u32) & 0x01) << 22;
self.w
}
}
#[doc = "Possible values of the field `I2C3RST`"]
pub type I2C3RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `I2C3RST`"]
pub type I2C3RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _I2C3RSTW<'a> {
w: &'a mut W,
}
impl<'a> _I2C3RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C3RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 23);
self.w.bits |= ((value as u32) & 0x01) << 23;
self.w
}
}
#[doc = "Possible values of the field `CECRST`"]
pub type CECRSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `CECRST`"]
pub type CECRSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _CECRSTW<'a> {
w: &'a mut W,
}
impl<'a> _CECRSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CECRSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 27);
self.w.bits |= ((value as u32) & 0x01) << 27;
self.w
}
}
#[doc = "Possible values of the field `DAC12RST`"]
pub type DAC12RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `DAC12RST`"]
pub type DAC12RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _DAC12RSTW<'a> {
w: &'a mut W,
}
impl<'a> _DAC12RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DAC12RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 29);
self.w.bits |= ((value as u32) & 0x01) << 29;
self.w
}
}
#[doc = "Possible values of the field `UART7RST`"]
pub type UART7RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `UART7RST`"]
pub type UART7RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _UART7RSTW<'a> {
w: &'a mut W,
}
impl<'a> _UART7RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART7RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 30);
self.w.bits |= ((value as u32) & 0x01) << 30;
self.w
}
}
#[doc = "Possible values of the field `UART8RST`"]
pub type UART8RSTR = TIM2RSTR;
#[doc = "Values that can be written to the field `UART8RST`"]
pub type UART8RSTW = TIM2RSTW;
#[doc = r"Proxy"]
pub struct _UART8RSTW<'a> {
w: &'a mut W,
}
impl<'a> _UART8RSTW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART8RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(TIM2RSTW::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 31);
self.w.bits |= ((value as u32) & 0x01) << 31;
self.w
}
}
impl R {
#[doc = r"Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - TIM block reset"]
#[inline(always)]
pub fn tim2rst(&self) -> TIM2RSTR {
TIM2RSTR::_from(((self.bits >> 0) & 0x01) != 0)
}
#[doc = "Bit 1 - TIM block reset"]
#[inline(always)]
pub fn tim3rst(&self) -> TIM3RSTR {
TIM3RSTR::_from(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - TIM block reset"]
#[inline(always)]
pub fn tim4rst(&self) -> TIM4RSTR {
TIM4RSTR::_from(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 3 - TIM block reset"]
#[inline(always)]
pub fn tim5rst(&self) -> TIM5RSTR {
TIM5RSTR::_from(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 4 - TIM block reset"]
#[inline(always)]
pub fn tim6rst(&self) -> TIM6RSTR {
TIM6RSTR::_from(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - TIM block reset"]
#[inline(always)]
pub fn tim7rst(&self) -> TIM7RSTR {
TIM7RSTR::_from(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 6 - TIM block reset"]
#[inline(always)]
pub fn tim12rst(&self) -> TIM12RSTR {
TIM12RSTR::_from(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 7 - TIM block reset"]
#[inline(always)]
pub fn tim13rst(&self) -> TIM13RSTR {
TIM13RSTR::_from(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 8 - TIM block reset"]
#[inline(always)]
pub fn tim14rst(&self) -> TIM14RSTR {
TIM14RSTR::_from(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 9 - TIM block reset"]
#[inline(always)]
pub fn lptim1rst(&self) -> LPTIM1RSTR {
LPTIM1RSTR::_from(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 14 - SPI2 block reset"]
#[inline(always)]
pub fn spi2rst(&self) -> SPI2RSTR {
SPI2RSTR::_from(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 15 - SPI3 block reset"]
#[inline(always)]
pub fn spi3rst(&self) -> SPI3RSTR {
SPI3RSTR::_from(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 16 - SPDIFRX block reset"]
#[inline(always)]
pub fn spdifrxrst(&self) -> SPDIFRXRSTR {
SPDIFRXRSTR::_from(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 17 - USART2 block reset"]
#[inline(always)]
pub fn usart2rst(&self) -> USART2RSTR {
USART2RSTR::_from(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 18 - USART3 block reset"]
#[inline(always)]
pub fn usart3rst(&self) -> USART3RSTR {
USART3RSTR::_from(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 19 - UART4 block reset"]
#[inline(always)]
pub fn uart4rst(&self) -> UART4RSTR {
UART4RSTR::_from(((self.bits >> 19) & 0x01) != 0)
}
#[doc = "Bit 20 - UART5 block reset"]
#[inline(always)]
pub fn uart5rst(&self) -> UART5RSTR {
UART5RSTR::_from(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 21 - I2C1 block reset"]
#[inline(always)]
pub fn i2c1rst(&self) -> I2C1RSTR {
I2C1RSTR::_from(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 22 - I2C2 block reset"]
#[inline(always)]
pub fn i2c2rst(&self) -> I2C2RSTR {
I2C2RSTR::_from(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 23 - I2C3 block reset"]
#[inline(always)]
pub fn i2c3rst(&self) -> I2C3RSTR {
I2C3RSTR::_from(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 27 - HDMI-CEC block reset"]
#[inline(always)]
pub fn cecrst(&self) -> CECRSTR {
CECRSTR::_from(((self.bits >> 27) & 0x01) != 0)
}
#[doc = "Bit 29 - DAC1 and 2 Blocks Reset"]
#[inline(always)]
pub fn dac12rst(&self) -> DAC12RSTR {
DAC12RSTR::_from(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 30 - UART7 block reset"]
#[inline(always)]
pub fn uart7rst(&self) -> UART7RSTR {
UART7RSTR::_from(((self.bits >> 30) & 0x01) != 0)
}
#[doc = "Bit 31 - UART8 block reset"]
#[inline(always)]
pub fn uart8rst(&self) -> UART8RSTR {
UART8RSTR::_from(((self.bits >> 31) & 0x01) != 0)
}
}
impl W {
#[doc = r"Writes raw bits to the register"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - TIM block reset"]
#[inline(always)]
pub fn tim2rst(&mut self) -> _TIM2RSTW {
_TIM2RSTW { w: self }
}
#[doc = "Bit 1 - TIM block reset"]
#[inline(always)]
pub fn tim3rst(&mut self) -> _TIM3RSTW {
_TIM3RSTW { w: self }
}
#[doc = "Bit 2 - TIM block reset"]
#[inline(always)]
pub fn tim4rst(&mut self) -> _TIM4RSTW {
_TIM4RSTW { w: self }
}
#[doc = "Bit 3 - TIM block reset"]
#[inline(always)]
pub fn tim5rst(&mut self) -> _TIM5RSTW {
_TIM5RSTW { w: self }
}
#[doc = "Bit 4 - TIM block reset"]
#[inline(always)]
pub fn tim6rst(&mut self) -> _TIM6RSTW {
_TIM6RSTW { w: self }
}
#[doc = "Bit 5 - TIM block reset"]
#[inline(always)]
pub fn tim7rst(&mut self) -> _TIM7RSTW {
_TIM7RSTW { w: self }
}
#[doc = "Bit 6 - TIM block reset"]
#[inline(always)]
pub fn tim12rst(&mut self) -> _TIM12RSTW {
_TIM12RSTW { w: self }
}
#[doc = "Bit 7 - TIM block reset"]
#[inline(always)]
pub fn tim13rst(&mut self) -> _TIM13RSTW {
_TIM13RSTW { w: self }
}
#[doc = "Bit 8 - TIM block reset"]
#[inline(always)]
pub fn tim14rst(&mut self) -> _TIM14RSTW {
_TIM14RSTW { w: self }
}
#[doc = "Bit 9 - TIM block reset"]
#[inline(always)]
pub fn lptim1rst(&mut self) -> _LPTIM1RSTW {
_LPTIM1RSTW { w: self }
}
#[doc = "Bit 14 - SPI2 block reset"]
#[inline(always)]
pub fn spi2rst(&mut self) -> _SPI2RSTW {
_SPI2RSTW { w: self }
}
#[doc = "Bit 15 - SPI3 block reset"]
#[inline(always)]
pub fn spi3rst(&mut self) -> _SPI3RSTW {
_SPI3RSTW { w: self }
}
#[doc = "Bit 16 - SPDIFRX block reset"]
#[inline(always)]
pub fn spdifrxrst(&mut self) -> _SPDIFRXRSTW {
_SPDIFRXRSTW { w: self }
}
#[doc = "Bit 17 - USART2 block reset"]
#[inline(always)]
pub fn usart2rst(&mut self) -> _USART2RSTW {
_USART2RSTW { w: self }
}
#[doc = "Bit 18 - USART3 block reset"]
#[inline(always)]
pub fn usart3rst(&mut self) -> _USART3RSTW {
_USART3RSTW { w: self }
}
#[doc = "Bit 19 - UART4 block reset"]
#[inline(always)]
pub fn uart4rst(&mut self) -> _UART4RSTW {
_UART4RSTW { w: self }
}
#[doc = "Bit 20 - UART5 block reset"]
#[inline(always)]
pub fn uart5rst(&mut self) -> _UART5RSTW {
_UART5RSTW { w: self }
}
#[doc = "Bit 21 - I2C1 block reset"]
#[inline(always)]
pub fn i2c1rst(&mut self) -> _I2C1RSTW {
_I2C1RSTW { w: self }
}
#[doc = "Bit 22 - I2C2 block reset"]
#[inline(always)]
pub fn i2c2rst(&mut self) -> _I2C2RSTW {
_I2C2RSTW { w: self }
}
#[doc = "Bit 23 - I2C3 block reset"]
#[inline(always)]
pub fn i2c3rst(&mut self) -> _I2C3RSTW {
_I2C3RSTW { w: self }
}
#[doc = "Bit 27 - HDMI-CEC block reset"]
#[inline(always)]
pub fn cecrst(&mut self) -> _CECRSTW {
_CECRSTW { w: self }
}
#[doc = "Bit 29 - DAC1 and 2 Blocks Reset"]
#[inline(always)]
pub fn dac12rst(&mut self) -> _DAC12RSTW {
_DAC12RSTW { w: self }
}
#[doc = "Bit 30 - UART7 block reset"]
#[inline(always)]
pub fn uart7rst(&mut self) -> _UART7RSTW {
_UART7RSTW { w: self }
}
#[doc = "Bit 31 - UART8 block reset"]
#[inline(always)]
pub fn uart8rst(&mut self) -> _UART8RSTW {
_UART8RSTW { w: self }
}
}