[−][src]Module stm32h7::stm32h743::sdmmc1::dtimer
The SDMMC_DTIMER register contains the data timeout period, in card bus clock periods. A counter loads the value from the SDMMC_DTIMER register, and starts decrementing when the data path state machine (DPSM) enters the Wait_R or Busy state. If the timer reaches 0 while the DPSM is in either of these states, the timeout status flag is set.
Structs
DATATIMER | Value of the field |
R | Value read from the register |
W | Value to write to the register |
_DATATIMEW | Proxy |