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#[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control register 1"] pub cr1: CR1, #[doc = "0x04 - control register 2"] pub cr2: CR2, _reserved2: [u8; 4usize], #[doc = "0x0c - DMA/Interrupt enable register"] pub dier: DIER, #[doc = "0x10 - status register"] pub sr: SR, #[doc = "0x14 - event generation register"] pub egr: EGR, _reserved_5_ccmr1: [u8; 4usize], _reserved6: [u8; 4usize], #[doc = "0x20 - capture/compare enable register"] pub ccer: CCER, #[doc = "0x24 - counter"] pub cnt: CNT, #[doc = "0x28 - prescaler"] pub psc: PSC, #[doc = "0x2c - auto-reload register"] pub arr: ARR, #[doc = "0x30 - repetition counter register"] pub rcr: RCR, #[doc = "0x34 - capture/compare register 1"] pub ccr1: CCR1, _reserved12: [u8; 12usize], #[doc = "0x44 - break and dead-time register"] pub bdtr: BDTR, #[doc = "0x48 - DMA control register"] pub dcr: DCR, #[doc = "0x4c - DMA address for full transfer"] pub dmar: DMAR, _reserved15: [u8; 16usize], #[doc = "0x60 - TIM16 alternate function register 1"] pub tim16_af1: TIM16_AF1, _reserved16: [u8; 4usize], #[doc = "0x68 - TIM16 input selection register"] pub tim16_tisel: TIM16_TISEL, } impl RegisterBlock { #[doc = "0x18 - capture/compare mode register 1 (input mode)"] #[inline(always)] pub fn ccmr1_input(&self) -> &CCMR1_INPUT { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const CCMR1_INPUT) } } #[doc = "0x18 - capture/compare mode register 1 (input mode)"] #[inline(always)] pub fn ccmr1_input_mut(&self) -> &mut CCMR1_INPUT { unsafe { &mut *(((self as *const Self) as *mut u8).add(24usize) as *mut CCMR1_INPUT) } } #[doc = "0x18 - capture/compare mode register (output mode)"] #[inline(always)] pub fn ccmr1_output(&self) -> &CCMR1_OUTPUT { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const CCMR1_OUTPUT) } } #[doc = "0x18 - capture/compare mode register (output mode)"] #[inline(always)] pub fn ccmr1_output_mut(&self) -> &mut CCMR1_OUTPUT { unsafe { &mut *(((self as *const Self) as *mut u8).add(24usize) as *mut CCMR1_OUTPUT) } } } #[doc = "control register 1"] pub struct CR1 { register: vcell::VolatileCell<u32>, } #[doc = "control register 1"] pub mod cr1; #[doc = "control register 2"] pub struct CR2 { register: vcell::VolatileCell<u32>, } #[doc = "control register 2"] pub mod cr2; #[doc = "DMA/Interrupt enable register"] pub struct DIER { register: vcell::VolatileCell<u32>, } #[doc = "DMA/Interrupt enable register"] pub mod dier; #[doc = "status register"] pub struct SR { register: vcell::VolatileCell<u32>, } #[doc = "status register"] pub mod sr; #[doc = "event generation register"] pub struct EGR { register: vcell::VolatileCell<u32>, } #[doc = "event generation register"] pub mod egr; #[doc = "capture/compare mode register (output mode)"] pub struct CCMR1_OUTPUT { register: vcell::VolatileCell<u32>, } #[doc = "capture/compare mode register (output mode)"] pub mod ccmr1_output; #[doc = "capture/compare mode register 1 (input mode)"] pub struct CCMR1_INPUT { register: vcell::VolatileCell<u32>, } #[doc = "capture/compare mode register 1 (input mode)"] pub mod ccmr1_input; #[doc = "capture/compare enable register"] pub struct CCER { register: vcell::VolatileCell<u32>, } #[doc = "capture/compare enable register"] pub mod ccer; #[doc = "counter"] pub struct CNT { register: vcell::VolatileCell<u32>, } #[doc = "counter"] pub mod cnt; #[doc = "prescaler"] pub struct PSC { register: vcell::VolatileCell<u32>, } #[doc = "prescaler"] pub mod psc; #[doc = "auto-reload register"] pub struct ARR { register: vcell::VolatileCell<u32>, } #[doc = "auto-reload register"] pub mod arr; #[doc = "repetition counter register"] pub struct RCR { register: vcell::VolatileCell<u32>, } #[doc = "repetition counter register"] pub mod rcr; #[doc = "capture/compare register 1"] pub struct CCR1 { register: vcell::VolatileCell<u32>, } #[doc = "capture/compare register 1"] pub mod ccr1; #[doc = "break and dead-time register"] pub struct BDTR { register: vcell::VolatileCell<u32>, } #[doc = "break and dead-time register"] pub mod bdtr; #[doc = "DMA control register"] pub struct DCR { register: vcell::VolatileCell<u32>, } #[doc = "DMA control register"] pub mod dcr; #[doc = "DMA address for full transfer"] pub struct DMAR { register: vcell::VolatileCell<u32>, } #[doc = "DMA address for full transfer"] pub mod dmar; #[doc = "TIM16 alternate function register 1"] pub struct TIM16_AF1 { register: vcell::VolatileCell<u32>, } #[doc = "TIM16 alternate function register 1"] pub mod tim16_af1; #[doc = "TIM16 input selection register"] pub struct TIM16_TISEL { register: vcell::VolatileCell<u32>, } #[doc = "TIM16 input selection register"] pub mod tim16_tisel;