#[doc = r"Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r"Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::C1_APB1LENR {
#[doc = r"Modifies the contents of the register"]
#[inline(always)]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
self.register.set(f(&R { bits }, &mut W { bits }).bits);
}
#[doc = r"Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r"Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
self.register.set(
f(&mut W {
bits: Self::reset_value(),
})
.bits,
);
}
#[doc = r"Reset value of the register"]
#[inline(always)]
pub const fn reset_value() -> u32 {
0
}
#[doc = r"Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.register.set(Self::reset_value())
}
}
#[doc = "Possible values of the field `TIM2EN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIM2ENR {
#[doc = "The selected clock is disabled"]
DISABLED,
#[doc = "The selected clock is enabled"]
ENABLED,
}
impl TIM2ENR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
TIM2ENR::DISABLED => false,
TIM2ENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> TIM2ENR {
match value {
false => TIM2ENR::DISABLED,
true => TIM2ENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == TIM2ENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == TIM2ENR::ENABLED
}
}
#[doc = "Values that can be written to the field `TIM2EN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIM2ENW {
#[doc = "The selected clock is disabled"]
DISABLED,
#[doc = "The selected clock is enabled"]
ENABLED,
}
impl TIM2ENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
TIM2ENW::DISABLED => false,
TIM2ENW::ENABLED => true,
}
}
}
#[doc = r"Proxy"]
pub struct _TIM2ENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM2ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM2ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 0);
self.w.bits |= ((value as u32) & 0x01) << 0;
self.w
}
}
#[doc = "Possible values of the field `TIM3EN`"]
pub type TIM3ENR = TIM2ENR;
#[doc = "Values that can be written to the field `TIM3EN`"]
pub type TIM3ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _TIM3ENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM3ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM3ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 1);
self.w.bits |= ((value as u32) & 0x01) << 1;
self.w
}
}
#[doc = "Possible values of the field `TIM4EN`"]
pub type TIM4ENR = TIM2ENR;
#[doc = "Values that can be written to the field `TIM4EN`"]
pub type TIM4ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _TIM4ENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM4ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM4ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 2);
self.w.bits |= ((value as u32) & 0x01) << 2;
self.w
}
}
#[doc = "Possible values of the field `TIM5EN`"]
pub type TIM5ENR = TIM2ENR;
#[doc = "Values that can be written to the field `TIM5EN`"]
pub type TIM5ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _TIM5ENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM5ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM5ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 3);
self.w.bits |= ((value as u32) & 0x01) << 3;
self.w
}
}
#[doc = "Possible values of the field `TIM6EN`"]
pub type TIM6ENR = TIM2ENR;
#[doc = "Values that can be written to the field `TIM6EN`"]
pub type TIM6ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _TIM6ENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM6ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM6ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 4);
self.w.bits |= ((value as u32) & 0x01) << 4;
self.w
}
}
#[doc = "Possible values of the field `TIM7EN`"]
pub type TIM7ENR = TIM2ENR;
#[doc = "Values that can be written to the field `TIM7EN`"]
pub type TIM7ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _TIM7ENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM7ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM7ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 5);
self.w.bits |= ((value as u32) & 0x01) << 5;
self.w
}
}
#[doc = "Possible values of the field `TIM12EN`"]
pub type TIM12ENR = TIM2ENR;
#[doc = "Values that can be written to the field `TIM12EN`"]
pub type TIM12ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _TIM12ENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM12ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM12ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 6);
self.w.bits |= ((value as u32) & 0x01) << 6;
self.w
}
}
#[doc = "Possible values of the field `TIM13EN`"]
pub type TIM13ENR = TIM2ENR;
#[doc = "Values that can be written to the field `TIM13EN`"]
pub type TIM13ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _TIM13ENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM13ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM13ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 7);
self.w.bits |= ((value as u32) & 0x01) << 7;
self.w
}
}
#[doc = "Possible values of the field `TIM14EN`"]
pub type TIM14ENR = TIM2ENR;
#[doc = "Values that can be written to the field `TIM14EN`"]
pub type TIM14ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _TIM14ENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM14ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM14ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 8);
self.w.bits |= ((value as u32) & 0x01) << 8;
self.w
}
}
#[doc = "Possible values of the field `LPTIM1EN`"]
pub type LPTIM1ENR = TIM2ENR;
#[doc = "Values that can be written to the field `LPTIM1EN`"]
pub type LPTIM1ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _LPTIM1ENW<'a> {
w: &'a mut W,
}
impl<'a> _LPTIM1ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LPTIM1ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 9);
self.w.bits |= ((value as u32) & 0x01) << 9;
self.w
}
}
#[doc = "Possible values of the field `SPI2EN`"]
pub type SPI2ENR = TIM2ENR;
#[doc = "Values that can be written to the field `SPI2EN`"]
pub type SPI2ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _SPI2ENW<'a> {
w: &'a mut W,
}
impl<'a> _SPI2ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI2ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 14);
self.w.bits |= ((value as u32) & 0x01) << 14;
self.w
}
}
#[doc = "Possible values of the field `SPI3EN`"]
pub type SPI3ENR = TIM2ENR;
#[doc = "Values that can be written to the field `SPI3EN`"]
pub type SPI3ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _SPI3ENW<'a> {
w: &'a mut W,
}
impl<'a> _SPI3ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI3ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 15);
self.w.bits |= ((value as u32) & 0x01) << 15;
self.w
}
}
#[doc = "Possible values of the field `SPDIFRXEN`"]
pub type SPDIFRXENR = TIM2ENR;
#[doc = "Values that can be written to the field `SPDIFRXEN`"]
pub type SPDIFRXENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _SPDIFRXENW<'a> {
w: &'a mut W,
}
impl<'a> _SPDIFRXENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPDIFRXENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 16);
self.w.bits |= ((value as u32) & 0x01) << 16;
self.w
}
}
#[doc = "Possible values of the field `USART2EN`"]
pub type USART2ENR = TIM2ENR;
#[doc = "Values that can be written to the field `USART2EN`"]
pub type USART2ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _USART2ENW<'a> {
w: &'a mut W,
}
impl<'a> _USART2ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART2ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 17);
self.w.bits |= ((value as u32) & 0x01) << 17;
self.w
}
}
#[doc = "Possible values of the field `USART3EN`"]
pub type USART3ENR = TIM2ENR;
#[doc = "Values that can be written to the field `USART3EN`"]
pub type USART3ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _USART3ENW<'a> {
w: &'a mut W,
}
impl<'a> _USART3ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART3ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 18);
self.w.bits |= ((value as u32) & 0x01) << 18;
self.w
}
}
#[doc = "Possible values of the field `UART4EN`"]
pub type UART4ENR = TIM2ENR;
#[doc = "Values that can be written to the field `UART4EN`"]
pub type UART4ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _UART4ENW<'a> {
w: &'a mut W,
}
impl<'a> _UART4ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART4ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 19);
self.w.bits |= ((value as u32) & 0x01) << 19;
self.w
}
}
#[doc = "Possible values of the field `UART5EN`"]
pub type UART5ENR = TIM2ENR;
#[doc = "Values that can be written to the field `UART5EN`"]
pub type UART5ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _UART5ENW<'a> {
w: &'a mut W,
}
impl<'a> _UART5ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART5ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 20);
self.w.bits |= ((value as u32) & 0x01) << 20;
self.w
}
}
#[doc = "Possible values of the field `I2C1EN`"]
pub type I2C1ENR = TIM2ENR;
#[doc = "Values that can be written to the field `I2C1EN`"]
pub type I2C1ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _I2C1ENW<'a> {
w: &'a mut W,
}
impl<'a> _I2C1ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C1ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 21);
self.w.bits |= ((value as u32) & 0x01) << 21;
self.w
}
}
#[doc = "Possible values of the field `I2C2EN`"]
pub type I2C2ENR = TIM2ENR;
#[doc = "Values that can be written to the field `I2C2EN`"]
pub type I2C2ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _I2C2ENW<'a> {
w: &'a mut W,
}
impl<'a> _I2C2ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C2ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 22);
self.w.bits |= ((value as u32) & 0x01) << 22;
self.w
}
}
#[doc = "Possible values of the field `I2C3EN`"]
pub type I2C3ENR = TIM2ENR;
#[doc = "Values that can be written to the field `I2C3EN`"]
pub type I2C3ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _I2C3ENW<'a> {
w: &'a mut W,
}
impl<'a> _I2C3ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C3ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 23);
self.w.bits |= ((value as u32) & 0x01) << 23;
self.w
}
}
#[doc = "Possible values of the field `CECEN`"]
pub type CECENR = TIM2ENR;
#[doc = "Values that can be written to the field `CECEN`"]
pub type CECENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _CECENW<'a> {
w: &'a mut W,
}
impl<'a> _CECENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CECENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 27);
self.w.bits |= ((value as u32) & 0x01) << 27;
self.w
}
}
#[doc = "Possible values of the field `DAC12EN`"]
pub type DAC12ENR = TIM2ENR;
#[doc = "Values that can be written to the field `DAC12EN`"]
pub type DAC12ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _DAC12ENW<'a> {
w: &'a mut W,
}
impl<'a> _DAC12ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DAC12ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 29);
self.w.bits |= ((value as u32) & 0x01) << 29;
self.w
}
}
#[doc = "Possible values of the field `UART7EN`"]
pub type UART7ENR = TIM2ENR;
#[doc = "Values that can be written to the field `UART7EN`"]
pub type UART7ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _UART7ENW<'a> {
w: &'a mut W,
}
impl<'a> _UART7ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART7ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 30);
self.w.bits |= ((value as u32) & 0x01) << 30;
self.w
}
}
#[doc = "Possible values of the field `UART8EN`"]
pub type UART8ENR = TIM2ENR;
#[doc = "Values that can be written to the field `UART8EN`"]
pub type UART8ENW = TIM2ENW;
#[doc = r"Proxy"]
pub struct _UART8ENW<'a> {
w: &'a mut W,
}
impl<'a> _UART8ENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART8ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2ENW::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2ENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 31);
self.w.bits |= ((value as u32) & 0x01) << 31;
self.w
}
}
impl R {
#[doc = r"Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim2en(&self) -> TIM2ENR {
TIM2ENR::_from(((self.bits >> 0) & 0x01) != 0)
}
#[doc = "Bit 1 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim3en(&self) -> TIM3ENR {
TIM3ENR::_from(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim4en(&self) -> TIM4ENR {
TIM4ENR::_from(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 3 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim5en(&self) -> TIM5ENR {
TIM5ENR::_from(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 4 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim6en(&self) -> TIM6ENR {
TIM6ENR::_from(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim7en(&self) -> TIM7ENR {
TIM7ENR::_from(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 6 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim12en(&self) -> TIM12ENR {
TIM12ENR::_from(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 7 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim13en(&self) -> TIM13ENR {
TIM13ENR::_from(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 8 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim14en(&self) -> TIM14ENR {
TIM14ENR::_from(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 9 - LPTIM1 Peripheral Clocks Enable"]
#[inline(always)]
pub fn lptim1en(&self) -> LPTIM1ENR {
LPTIM1ENR::_from(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 14 - SPI2 Peripheral Clocks Enable"]
#[inline(always)]
pub fn spi2en(&self) -> SPI2ENR {
SPI2ENR::_from(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 15 - SPI3 Peripheral Clocks Enable"]
#[inline(always)]
pub fn spi3en(&self) -> SPI3ENR {
SPI3ENR::_from(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 16 - SPDIFRX Peripheral Clocks Enable"]
#[inline(always)]
pub fn spdifrxen(&self) -> SPDIFRXENR {
SPDIFRXENR::_from(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 17 - USART2 Peripheral Clocks Enable"]
#[inline(always)]
pub fn usart2en(&self) -> USART2ENR {
USART2ENR::_from(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 18 - USART3 Peripheral Clocks Enable"]
#[inline(always)]
pub fn usart3en(&self) -> USART3ENR {
USART3ENR::_from(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 19 - UART4 Peripheral Clocks Enable"]
#[inline(always)]
pub fn uart4en(&self) -> UART4ENR {
UART4ENR::_from(((self.bits >> 19) & 0x01) != 0)
}
#[doc = "Bit 20 - UART5 Peripheral Clocks Enable"]
#[inline(always)]
pub fn uart5en(&self) -> UART5ENR {
UART5ENR::_from(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 21 - I2C1 Peripheral Clocks Enable"]
#[inline(always)]
pub fn i2c1en(&self) -> I2C1ENR {
I2C1ENR::_from(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 22 - I2C2 Peripheral Clocks Enable"]
#[inline(always)]
pub fn i2c2en(&self) -> I2C2ENR {
I2C2ENR::_from(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 23 - I2C3 Peripheral Clocks Enable"]
#[inline(always)]
pub fn i2c3en(&self) -> I2C3ENR {
I2C3ENR::_from(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 27 - HDMI-CEC peripheral clock enable"]
#[inline(always)]
pub fn cecen(&self) -> CECENR {
CECENR::_from(((self.bits >> 27) & 0x01) != 0)
}
#[doc = "Bit 29 - DAC1&2 peripheral clock enable"]
#[inline(always)]
pub fn dac12en(&self) -> DAC12ENR {
DAC12ENR::_from(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 30 - UART7 Peripheral Clocks Enable"]
#[inline(always)]
pub fn uart7en(&self) -> UART7ENR {
UART7ENR::_from(((self.bits >> 30) & 0x01) != 0)
}
#[doc = "Bit 31 - UART8 Peripheral Clocks Enable"]
#[inline(always)]
pub fn uart8en(&self) -> UART8ENR {
UART8ENR::_from(((self.bits >> 31) & 0x01) != 0)
}
}
impl W {
#[doc = r"Writes raw bits to the register"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim2en(&mut self) -> _TIM2ENW {
_TIM2ENW { w: self }
}
#[doc = "Bit 1 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim3en(&mut self) -> _TIM3ENW {
_TIM3ENW { w: self }
}
#[doc = "Bit 2 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim4en(&mut self) -> _TIM4ENW {
_TIM4ENW { w: self }
}
#[doc = "Bit 3 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim5en(&mut self) -> _TIM5ENW {
_TIM5ENW { w: self }
}
#[doc = "Bit 4 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim6en(&mut self) -> _TIM6ENW {
_TIM6ENW { w: self }
}
#[doc = "Bit 5 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim7en(&mut self) -> _TIM7ENW {
_TIM7ENW { w: self }
}
#[doc = "Bit 6 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim12en(&mut self) -> _TIM12ENW {
_TIM12ENW { w: self }
}
#[doc = "Bit 7 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim13en(&mut self) -> _TIM13ENW {
_TIM13ENW { w: self }
}
#[doc = "Bit 8 - TIM peripheral clock enable"]
#[inline(always)]
pub fn tim14en(&mut self) -> _TIM14ENW {
_TIM14ENW { w: self }
}
#[doc = "Bit 9 - LPTIM1 Peripheral Clocks Enable"]
#[inline(always)]
pub fn lptim1en(&mut self) -> _LPTIM1ENW {
_LPTIM1ENW { w: self }
}
#[doc = "Bit 14 - SPI2 Peripheral Clocks Enable"]
#[inline(always)]
pub fn spi2en(&mut self) -> _SPI2ENW {
_SPI2ENW { w: self }
}
#[doc = "Bit 15 - SPI3 Peripheral Clocks Enable"]
#[inline(always)]
pub fn spi3en(&mut self) -> _SPI3ENW {
_SPI3ENW { w: self }
}
#[doc = "Bit 16 - SPDIFRX Peripheral Clocks Enable"]
#[inline(always)]
pub fn spdifrxen(&mut self) -> _SPDIFRXENW {
_SPDIFRXENW { w: self }
}
#[doc = "Bit 17 - USART2 Peripheral Clocks Enable"]
#[inline(always)]
pub fn usart2en(&mut self) -> _USART2ENW {
_USART2ENW { w: self }
}
#[doc = "Bit 18 - USART3 Peripheral Clocks Enable"]
#[inline(always)]
pub fn usart3en(&mut self) -> _USART3ENW {
_USART3ENW { w: self }
}
#[doc = "Bit 19 - UART4 Peripheral Clocks Enable"]
#[inline(always)]
pub fn uart4en(&mut self) -> _UART4ENW {
_UART4ENW { w: self }
}
#[doc = "Bit 20 - UART5 Peripheral Clocks Enable"]
#[inline(always)]
pub fn uart5en(&mut self) -> _UART5ENW {
_UART5ENW { w: self }
}
#[doc = "Bit 21 - I2C1 Peripheral Clocks Enable"]
#[inline(always)]
pub fn i2c1en(&mut self) -> _I2C1ENW {
_I2C1ENW { w: self }
}
#[doc = "Bit 22 - I2C2 Peripheral Clocks Enable"]
#[inline(always)]
pub fn i2c2en(&mut self) -> _I2C2ENW {
_I2C2ENW { w: self }
}
#[doc = "Bit 23 - I2C3 Peripheral Clocks Enable"]
#[inline(always)]
pub fn i2c3en(&mut self) -> _I2C3ENW {
_I2C3ENW { w: self }
}
#[doc = "Bit 27 - HDMI-CEC peripheral clock enable"]
#[inline(always)]
pub fn cecen(&mut self) -> _CECENW {
_CECENW { w: self }
}
#[doc = "Bit 29 - DAC1&2 peripheral clock enable"]
#[inline(always)]
pub fn dac12en(&mut self) -> _DAC12ENW {
_DAC12ENW { w: self }
}
#[doc = "Bit 30 - UART7 Peripheral Clocks Enable"]
#[inline(always)]
pub fn uart7en(&mut self) -> _UART7ENW {
_UART7ENW { w: self }
}
#[doc = "Bit 31 - UART8 Peripheral Clocks Enable"]
#[inline(always)]
pub fn uart8en(&mut self) -> _UART8ENW {
_UART8ENW { w: self }
}
}