#[doc = r"Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r"Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CFGR {
#[doc = r"Modifies the contents of the register"]
#[inline(always)]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
self.register.set(f(&R { bits }, &mut W { bits }).bits);
}
#[doc = r"Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r"Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
self.register.set(
f(&mut W {
bits: Self::reset_value(),
})
.bits,
);
}
#[doc = r"Reset value of the register"]
#[inline(always)]
pub const fn reset_value() -> u32 {
0
}
#[doc = r"Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.register.set(Self::reset_value())
}
}
#[doc = "Possible values of the field `SW`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SWR {
#[doc = "HSI selected as system clock"]
HSI,
#[doc = "CSI selected as system clock"]
CSI,
#[doc = "HSE selected as system clock"]
HSE,
#[doc = "PLL1 selected as system clock"]
PLL1,
#[doc = r"Reserved"]
_Reserved(u8),
}
impl SWR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
SWR::HSI => 0,
SWR::CSI => 0x01,
SWR::HSE => 0x02,
SWR::PLL1 => 0x03,
SWR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> SWR {
match value {
0 => SWR::HSI,
1 => SWR::CSI,
2 => SWR::HSE,
3 => SWR::PLL1,
i => SWR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `HSI`"]
#[inline(always)]
pub fn is_hsi(&self) -> bool {
*self == SWR::HSI
}
#[doc = "Checks if the value of the field is `CSI`"]
#[inline(always)]
pub fn is_csi(&self) -> bool {
*self == SWR::CSI
}
#[doc = "Checks if the value of the field is `HSE`"]
#[inline(always)]
pub fn is_hse(&self) -> bool {
*self == SWR::HSE
}
#[doc = "Checks if the value of the field is `PLL1`"]
#[inline(always)]
pub fn is_pll1(&self) -> bool {
*self == SWR::PLL1
}
}
#[doc = "Values that can be written to the field `SW`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SWW {
#[doc = "HSI selected as system clock"]
HSI,
#[doc = "CSI selected as system clock"]
CSI,
#[doc = "HSE selected as system clock"]
HSE,
#[doc = "PLL1 selected as system clock"]
PLL1,
}
impl SWW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
SWW::HSI => 0,
SWW::CSI => 1,
SWW::HSE => 2,
SWW::PLL1 => 3,
}
}
}
#[doc = r"Proxy"]
pub struct _SWW<'a> {
w: &'a mut W,
}
impl<'a> _SWW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SWW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "HSI selected as system clock"]
#[inline(always)]
pub fn hsi(self) -> &'a mut W {
self.variant(SWW::HSI)
}
#[doc = "CSI selected as system clock"]
#[inline(always)]
pub fn csi(self) -> &'a mut W {
self.variant(SWW::CSI)
}
#[doc = "HSE selected as system clock"]
#[inline(always)]
pub fn hse(self) -> &'a mut W {
self.variant(SWW::HSE)
}
#[doc = "PLL1 selected as system clock"]
#[inline(always)]
pub fn pll1(self) -> &'a mut W {
self.variant(SWW::PLL1)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x07 << 0);
self.w.bits |= ((value as u32) & 0x07) << 0;
self.w
}
}
#[doc = "Possible values of the field `SWS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SWSR {
#[doc = "HSI oscillator used as system clock"]
HSI,
#[doc = "CSI oscillator used as system clock"]
CSI,
#[doc = "HSE oscillator used as system clock"]
HSE,
#[doc = "PLL1 used as system clock"]
PLL1,
#[doc = r"Reserved"]
_Reserved(u8),
}
impl SWSR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
SWSR::HSI => 0,
SWSR::CSI => 0x01,
SWSR::HSE => 0x02,
SWSR::PLL1 => 0x03,
SWSR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> SWSR {
match value {
0 => SWSR::HSI,
1 => SWSR::CSI,
2 => SWSR::HSE,
3 => SWSR::PLL1,
i => SWSR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `HSI`"]
#[inline(always)]
pub fn is_hsi(&self) -> bool {
*self == SWSR::HSI
}
#[doc = "Checks if the value of the field is `CSI`"]
#[inline(always)]
pub fn is_csi(&self) -> bool {
*self == SWSR::CSI
}
#[doc = "Checks if the value of the field is `HSE`"]
#[inline(always)]
pub fn is_hse(&self) -> bool {
*self == SWSR::HSE
}
#[doc = "Checks if the value of the field is `PLL1`"]
#[inline(always)]
pub fn is_pll1(&self) -> bool {
*self == SWSR::PLL1
}
}
#[doc = "Values that can be written to the field `SWS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SWSW {
#[doc = "HSI oscillator used as system clock"]
HSI,
#[doc = "CSI oscillator used as system clock"]
CSI,
#[doc = "HSE oscillator used as system clock"]
HSE,
#[doc = "PLL1 used as system clock"]
PLL1,
}
impl SWSW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
SWSW::HSI => 0,
SWSW::CSI => 1,
SWSW::HSE => 2,
SWSW::PLL1 => 3,
}
}
}
#[doc = r"Proxy"]
pub struct _SWSW<'a> {
w: &'a mut W,
}
impl<'a> _SWSW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SWSW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "HSI oscillator used as system clock"]
#[inline(always)]
pub fn hsi(self) -> &'a mut W {
self.variant(SWSW::HSI)
}
#[doc = "CSI oscillator used as system clock"]
#[inline(always)]
pub fn csi(self) -> &'a mut W {
self.variant(SWSW::CSI)
}
#[doc = "HSE oscillator used as system clock"]
#[inline(always)]
pub fn hse(self) -> &'a mut W {
self.variant(SWSW::HSE)
}
#[doc = "PLL1 used as system clock"]
#[inline(always)]
pub fn pll1(self) -> &'a mut W {
self.variant(SWSW::PLL1)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x07 << 3);
self.w.bits |= ((value as u32) & 0x07) << 3;
self.w
}
}
#[doc = "Possible values of the field `STOPWUCK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum STOPWUCKR {
#[doc = "HSI selected as wake up clock from system Stop"]
HSI,
#[doc = "CSI selected as wake up clock from system Stop"]
CSI,
}
impl STOPWUCKR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
STOPWUCKR::HSI => false,
STOPWUCKR::CSI => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> STOPWUCKR {
match value {
false => STOPWUCKR::HSI,
true => STOPWUCKR::CSI,
}
}
#[doc = "Checks if the value of the field is `HSI`"]
#[inline(always)]
pub fn is_hsi(&self) -> bool {
*self == STOPWUCKR::HSI
}
#[doc = "Checks if the value of the field is `CSI`"]
#[inline(always)]
pub fn is_csi(&self) -> bool {
*self == STOPWUCKR::CSI
}
}
#[doc = "Values that can be written to the field `STOPWUCK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum STOPWUCKW {
#[doc = "HSI selected as wake up clock from system Stop"]
HSI,
#[doc = "CSI selected as wake up clock from system Stop"]
CSI,
}
impl STOPWUCKW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
STOPWUCKW::HSI => false,
STOPWUCKW::CSI => true,
}
}
}
#[doc = r"Proxy"]
pub struct _STOPWUCKW<'a> {
w: &'a mut W,
}
impl<'a> _STOPWUCKW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: STOPWUCKW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "HSI selected as wake up clock from system Stop"]
#[inline(always)]
pub fn hsi(self) -> &'a mut W {
self.variant(STOPWUCKW::HSI)
}
#[doc = "CSI selected as wake up clock from system Stop"]
#[inline(always)]
pub fn csi(self) -> &'a mut W {
self.variant(STOPWUCKW::CSI)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 6);
self.w.bits |= ((value as u32) & 0x01) << 6;
self.w
}
}
#[doc = "Possible values of the field `STOPKERWUCK`"]
pub type STOPKERWUCKR = STOPWUCKR;
#[doc = "Values that can be written to the field `STOPKERWUCK`"]
pub type STOPKERWUCKW = STOPWUCKW;
#[doc = r"Proxy"]
pub struct _STOPKERWUCKW<'a> {
w: &'a mut W,
}
impl<'a> _STOPKERWUCKW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: STOPKERWUCKW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "HSI selected as wake up clock from system Stop"]
#[inline(always)]
pub fn hsi(self) -> &'a mut W {
self.variant(STOPWUCKW::HSI)
}
#[doc = "CSI selected as wake up clock from system Stop"]
#[inline(always)]
pub fn csi(self) -> &'a mut W {
self.variant(STOPWUCKW::CSI)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 7);
self.w.bits |= ((value as u32) & 0x01) << 7;
self.w
}
}
#[doc = r"Value of the field"]
pub struct RTCPRER {
bits: u8,
}
impl RTCPRER {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r"Proxy"]
pub struct _RTCPREW<'a> {
w: &'a mut W,
}
impl<'a> _RTCPREW<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x3f << 8);
self.w.bits |= ((value as u32) & 0x3f) << 8;
self.w
}
}
#[doc = "Possible values of the field `HRTIMSEL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HRTIMSELR {
#[doc = "The HRTIM prescaler clock source is the same as other timers (rcc_timy_ker_ck)"]
TIMY_KER,
#[doc = "The HRTIM prescaler clock source is the CPU clock (c_ck)"]
C_CK,
}
impl HRTIMSELR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
HRTIMSELR::TIMY_KER => false,
HRTIMSELR::C_CK => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> HRTIMSELR {
match value {
false => HRTIMSELR::TIMY_KER,
true => HRTIMSELR::C_CK,
}
}
#[doc = "Checks if the value of the field is `TIMY_KER`"]
#[inline(always)]
pub fn is_timy_ker(&self) -> bool {
*self == HRTIMSELR::TIMY_KER
}
#[doc = "Checks if the value of the field is `C_CK`"]
#[inline(always)]
pub fn is_c_ck(&self) -> bool {
*self == HRTIMSELR::C_CK
}
}
#[doc = "Values that can be written to the field `HRTIMSEL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HRTIMSELW {
#[doc = "The HRTIM prescaler clock source is the same as other timers (rcc_timy_ker_ck)"]
TIMY_KER,
#[doc = "The HRTIM prescaler clock source is the CPU clock (c_ck)"]
C_CK,
}
impl HRTIMSELW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
HRTIMSELW::TIMY_KER => false,
HRTIMSELW::C_CK => true,
}
}
}
#[doc = r"Proxy"]
pub struct _HRTIMSELW<'a> {
w: &'a mut W,
}
impl<'a> _HRTIMSELW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: HRTIMSELW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The HRTIM prescaler clock source is the same as other timers (rcc_timy_ker_ck)"]
#[inline(always)]
pub fn timy_ker(self) -> &'a mut W {
self.variant(HRTIMSELW::TIMY_KER)
}
#[doc = "The HRTIM prescaler clock source is the CPU clock (c_ck)"]
#[inline(always)]
pub fn c_ck(self) -> &'a mut W {
self.variant(HRTIMSELW::C_CK)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 14);
self.w.bits |= ((value as u32) & 0x01) << 14;
self.w
}
}
#[doc = "Possible values of the field `TIMPRE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIMPRER {
#[doc = "Timer kernel clock equal to 2x pclk by default"]
DEFAULTX2,
#[doc = "Timer kernel clock equal to 4x pclk by default"]
DEFAULTX4,
}
impl TIMPRER {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
TIMPRER::DEFAULTX2 => false,
TIMPRER::DEFAULTX4 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> TIMPRER {
match value {
false => TIMPRER::DEFAULTX2,
true => TIMPRER::DEFAULTX4,
}
}
#[doc = "Checks if the value of the field is `DEFAULTX2`"]
#[inline(always)]
pub fn is_default_x2(&self) -> bool {
*self == TIMPRER::DEFAULTX2
}
#[doc = "Checks if the value of the field is `DEFAULTX4`"]
#[inline(always)]
pub fn is_default_x4(&self) -> bool {
*self == TIMPRER::DEFAULTX4
}
}
#[doc = "Values that can be written to the field `TIMPRE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIMPREW {
#[doc = "Timer kernel clock equal to 2x pclk by default"]
DEFAULTX2,
#[doc = "Timer kernel clock equal to 4x pclk by default"]
DEFAULTX4,
}
impl TIMPREW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
TIMPREW::DEFAULTX2 => false,
TIMPREW::DEFAULTX4 => true,
}
}
}
#[doc = r"Proxy"]
pub struct _TIMPREW<'a> {
w: &'a mut W,
}
impl<'a> _TIMPREW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIMPREW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Timer kernel clock equal to 2x pclk by default"]
#[inline(always)]
pub fn default_x2(self) -> &'a mut W {
self.variant(TIMPREW::DEFAULTX2)
}
#[doc = "Timer kernel clock equal to 4x pclk by default"]
#[inline(always)]
pub fn default_x4(self) -> &'a mut W {
self.variant(TIMPREW::DEFAULTX4)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 15);
self.w.bits |= ((value as u32) & 0x01) << 15;
self.w
}
}
#[doc = r"Value of the field"]
pub struct MCO1PRER {
bits: u8,
}
impl MCO1PRER {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r"Proxy"]
pub struct _MCO1PREW<'a> {
w: &'a mut W,
}
impl<'a> _MCO1PREW<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x0f << 18);
self.w.bits |= ((value as u32) & 0x0f) << 18;
self.w
}
}
#[doc = "Possible values of the field `MCO1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MCO1R {
#[doc = "HSI selected for micro-controller clock output"]
HSI,
#[doc = "LSE selected for micro-controller clock output"]
LSE,
#[doc = "HSE selected for micro-controller clock output"]
HSE,
#[doc = "pll1_q selected for micro-controller clock output"]
PLL1_Q,
#[doc = "HSI48 selected for micro-controller clock output"]
HSI48,
#[doc = r"Reserved"]
_Reserved(u8),
}
impl MCO1R {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
MCO1R::HSI => 0,
MCO1R::LSE => 0x01,
MCO1R::HSE => 0x02,
MCO1R::PLL1_Q => 0x03,
MCO1R::HSI48 => 0x04,
MCO1R::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> MCO1R {
match value {
0 => MCO1R::HSI,
1 => MCO1R::LSE,
2 => MCO1R::HSE,
3 => MCO1R::PLL1_Q,
4 => MCO1R::HSI48,
i => MCO1R::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `HSI`"]
#[inline(always)]
pub fn is_hsi(&self) -> bool {
*self == MCO1R::HSI
}
#[doc = "Checks if the value of the field is `LSE`"]
#[inline(always)]
pub fn is_lse(&self) -> bool {
*self == MCO1R::LSE
}
#[doc = "Checks if the value of the field is `HSE`"]
#[inline(always)]
pub fn is_hse(&self) -> bool {
*self == MCO1R::HSE
}
#[doc = "Checks if the value of the field is `PLL1_Q`"]
#[inline(always)]
pub fn is_pll1_q(&self) -> bool {
*self == MCO1R::PLL1_Q
}
#[doc = "Checks if the value of the field is `HSI48`"]
#[inline(always)]
pub fn is_hsi48(&self) -> bool {
*self == MCO1R::HSI48
}
}
#[doc = "Values that can be written to the field `MCO1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MCO1W {
#[doc = "HSI selected for micro-controller clock output"]
HSI,
#[doc = "LSE selected for micro-controller clock output"]
LSE,
#[doc = "HSE selected for micro-controller clock output"]
HSE,
#[doc = "pll1_q selected for micro-controller clock output"]
PLL1_Q,
#[doc = "HSI48 selected for micro-controller clock output"]
HSI48,
}
impl MCO1W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
MCO1W::HSI => 0,
MCO1W::LSE => 1,
MCO1W::HSE => 2,
MCO1W::PLL1_Q => 3,
MCO1W::HSI48 => 4,
}
}
}
#[doc = r"Proxy"]
pub struct _MCO1W<'a> {
w: &'a mut W,
}
impl<'a> _MCO1W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: MCO1W) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "HSI selected for micro-controller clock output"]
#[inline(always)]
pub fn hsi(self) -> &'a mut W {
self.variant(MCO1W::HSI)
}
#[doc = "LSE selected for micro-controller clock output"]
#[inline(always)]
pub fn lse(self) -> &'a mut W {
self.variant(MCO1W::LSE)
}
#[doc = "HSE selected for micro-controller clock output"]
#[inline(always)]
pub fn hse(self) -> &'a mut W {
self.variant(MCO1W::HSE)
}
#[doc = "pll1_q selected for micro-controller clock output"]
#[inline(always)]
pub fn pll1_q(self) -> &'a mut W {
self.variant(MCO1W::PLL1_Q)
}
#[doc = "HSI48 selected for micro-controller clock output"]
#[inline(always)]
pub fn hsi48(self) -> &'a mut W {
self.variant(MCO1W::HSI48)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x07 << 22);
self.w.bits |= ((value as u32) & 0x07) << 22;
self.w
}
}
#[doc = r"Value of the field"]
pub struct MCO2PRER {
bits: u8,
}
impl MCO2PRER {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r"Proxy"]
pub struct _MCO2PREW<'a> {
w: &'a mut W,
}
impl<'a> _MCO2PREW<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x0f << 25);
self.w.bits |= ((value as u32) & 0x0f) << 25;
self.w
}
}
#[doc = "Possible values of the field `MCO2`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MCO2R {
#[doc = "System clock selected for micro-controller clock output"]
SYSCLK,
#[doc = "pll2_p selected for micro-controller clock output"]
PLL2_P,
#[doc = "HSE selected for micro-controller clock output"]
HSE,
#[doc = "pll1_p selected for micro-controller clock output"]
PLL1_P,
#[doc = "CSI selected for micro-controller clock output"]
CSI,
#[doc = "LSI selected for micro-controller clock output"]
LSI,
#[doc = r"Reserved"]
_Reserved(u8),
}
impl MCO2R {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
MCO2R::SYSCLK => 0,
MCO2R::PLL2_P => 0x01,
MCO2R::HSE => 0x02,
MCO2R::PLL1_P => 0x03,
MCO2R::CSI => 0x04,
MCO2R::LSI => 0x05,
MCO2R::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> MCO2R {
match value {
0 => MCO2R::SYSCLK,
1 => MCO2R::PLL2_P,
2 => MCO2R::HSE,
3 => MCO2R::PLL1_P,
4 => MCO2R::CSI,
5 => MCO2R::LSI,
i => MCO2R::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `SYSCLK`"]
#[inline(always)]
pub fn is_sysclk(&self) -> bool {
*self == MCO2R::SYSCLK
}
#[doc = "Checks if the value of the field is `PLL2_P`"]
#[inline(always)]
pub fn is_pll2_p(&self) -> bool {
*self == MCO2R::PLL2_P
}
#[doc = "Checks if the value of the field is `HSE`"]
#[inline(always)]
pub fn is_hse(&self) -> bool {
*self == MCO2R::HSE
}
#[doc = "Checks if the value of the field is `PLL1_P`"]
#[inline(always)]
pub fn is_pll1_p(&self) -> bool {
*self == MCO2R::PLL1_P
}
#[doc = "Checks if the value of the field is `CSI`"]
#[inline(always)]
pub fn is_csi(&self) -> bool {
*self == MCO2R::CSI
}
#[doc = "Checks if the value of the field is `LSI`"]
#[inline(always)]
pub fn is_lsi(&self) -> bool {
*self == MCO2R::LSI
}
}
#[doc = "Values that can be written to the field `MCO2`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MCO2W {
#[doc = "System clock selected for micro-controller clock output"]
SYSCLK,
#[doc = "pll2_p selected for micro-controller clock output"]
PLL2_P,
#[doc = "HSE selected for micro-controller clock output"]
HSE,
#[doc = "pll1_p selected for micro-controller clock output"]
PLL1_P,
#[doc = "CSI selected for micro-controller clock output"]
CSI,
#[doc = "LSI selected for micro-controller clock output"]
LSI,
}
impl MCO2W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
MCO2W::SYSCLK => 0,
MCO2W::PLL2_P => 1,
MCO2W::HSE => 2,
MCO2W::PLL1_P => 3,
MCO2W::CSI => 4,
MCO2W::LSI => 5,
}
}
}
#[doc = r"Proxy"]
pub struct _MCO2W<'a> {
w: &'a mut W,
}
impl<'a> _MCO2W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: MCO2W) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "System clock selected for micro-controller clock output"]
#[inline(always)]
pub fn sysclk(self) -> &'a mut W {
self.variant(MCO2W::SYSCLK)
}
#[doc = "pll2_p selected for micro-controller clock output"]
#[inline(always)]
pub fn pll2_p(self) -> &'a mut W {
self.variant(MCO2W::PLL2_P)
}
#[doc = "HSE selected for micro-controller clock output"]
#[inline(always)]
pub fn hse(self) -> &'a mut W {
self.variant(MCO2W::HSE)
}
#[doc = "pll1_p selected for micro-controller clock output"]
#[inline(always)]
pub fn pll1_p(self) -> &'a mut W {
self.variant(MCO2W::PLL1_P)
}
#[doc = "CSI selected for micro-controller clock output"]
#[inline(always)]
pub fn csi(self) -> &'a mut W {
self.variant(MCO2W::CSI)
}
#[doc = "LSI selected for micro-controller clock output"]
#[inline(always)]
pub fn lsi(self) -> &'a mut W {
self.variant(MCO2W::LSI)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x07 << 29);
self.w.bits |= ((value as u32) & 0x07) << 29;
self.w
}
}
impl R {
#[doc = r"Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:2 - System clock switch"]
#[inline(always)]
pub fn sw(&self) -> SWR {
SWR::_from(((self.bits >> 0) & 0x07) as u8)
}
#[doc = "Bits 3:5 - System clock switch status"]
#[inline(always)]
pub fn sws(&self) -> SWSR {
SWSR::_from(((self.bits >> 3) & 0x07) as u8)
}
#[doc = "Bit 6 - System clock selection after a wake up from system Stop"]
#[inline(always)]
pub fn stopwuck(&self) -> STOPWUCKR {
STOPWUCKR::_from(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 7 - Kernel clock selection after a wake up from system Stop"]
#[inline(always)]
pub fn stopkerwuck(&self) -> STOPKERWUCKR {
STOPKERWUCKR::_from(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bits 8:13 - HSE division factor for RTC clock"]
#[inline(always)]
pub fn rtcpre(&self) -> RTCPRER {
let bits = ((self.bits >> 8) & 0x3f) as u8;
RTCPRER { bits }
}
#[doc = "Bit 14 - High Resolution Timer clock prescaler selection"]
#[inline(always)]
pub fn hrtimsel(&self) -> HRTIMSELR {
HRTIMSELR::_from(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 15 - Timers clocks prescaler selection"]
#[inline(always)]
pub fn timpre(&self) -> TIMPRER {
TIMPRER::_from(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bits 18:21 - MCO1 prescaler"]
#[inline(always)]
pub fn mco1pre(&self) -> MCO1PRER {
let bits = ((self.bits >> 18) & 0x0f) as u8;
MCO1PRER { bits }
}
#[doc = "Bits 22:24 - Micro-controller clock output 1"]
#[inline(always)]
pub fn mco1(&self) -> MCO1R {
MCO1R::_from(((self.bits >> 22) & 0x07) as u8)
}
#[doc = "Bits 25:28 - MCO2 prescaler"]
#[inline(always)]
pub fn mco2pre(&self) -> MCO2PRER {
let bits = ((self.bits >> 25) & 0x0f) as u8;
MCO2PRER { bits }
}
#[doc = "Bits 29:31 - Micro-controller clock output 2"]
#[inline(always)]
pub fn mco2(&self) -> MCO2R {
MCO2R::_from(((self.bits >> 29) & 0x07) as u8)
}
}
impl W {
#[doc = r"Writes raw bits to the register"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:2 - System clock switch"]
#[inline(always)]
pub fn sw(&mut self) -> _SWW {
_SWW { w: self }
}
#[doc = "Bits 3:5 - System clock switch status"]
#[inline(always)]
pub fn sws(&mut self) -> _SWSW {
_SWSW { w: self }
}
#[doc = "Bit 6 - System clock selection after a wake up from system Stop"]
#[inline(always)]
pub fn stopwuck(&mut self) -> _STOPWUCKW {
_STOPWUCKW { w: self }
}
#[doc = "Bit 7 - Kernel clock selection after a wake up from system Stop"]
#[inline(always)]
pub fn stopkerwuck(&mut self) -> _STOPKERWUCKW {
_STOPKERWUCKW { w: self }
}
#[doc = "Bits 8:13 - HSE division factor for RTC clock"]
#[inline(always)]
pub fn rtcpre(&mut self) -> _RTCPREW {
_RTCPREW { w: self }
}
#[doc = "Bit 14 - High Resolution Timer clock prescaler selection"]
#[inline(always)]
pub fn hrtimsel(&mut self) -> _HRTIMSELW {
_HRTIMSELW { w: self }
}
#[doc = "Bit 15 - Timers clocks prescaler selection"]
#[inline(always)]
pub fn timpre(&mut self) -> _TIMPREW {
_TIMPREW { w: self }
}
#[doc = "Bits 18:21 - MCO1 prescaler"]
#[inline(always)]
pub fn mco1pre(&mut self) -> _MCO1PREW {
_MCO1PREW { w: self }
}
#[doc = "Bits 22:24 - Micro-controller clock output 1"]
#[inline(always)]
pub fn mco1(&mut self) -> _MCO1W {
_MCO1W { w: self }
}
#[doc = "Bits 25:28 - MCO2 prescaler"]
#[inline(always)]
pub fn mco2pre(&mut self) -> _MCO2PREW {
_MCO2PREW { w: self }
}
#[doc = "Bits 29:31 - Micro-controller clock output 2"]
#[inline(always)]
pub fn mco2(&mut self) -> _MCO2W {
_MCO2W { w: self }
}
}