stm32h5/stm32h573/rtc/
ssr.rs

1///Register `SSR` reader
2pub type R = crate::R<SSRrs>;
3///Field `SS` reader - Synchronous binary counter SS\[31:16\]: Synchronous binary counter MSB values When Binary or Mixed mode is selected (BIN = 01 or 10 or 11): SS\[31:16\] are the 16 MSB of the SS\[31:0\] free-running down-counter. When BCD mode is selected (BIN=00): SS\[31:16\] are forced by hardware to 0x0000. SS\[15:0\]: Sub second value/Synchronous binary counter LSB values When Binary mode is selected (BIN = 01 or 10 or 11): SS\[15:0\] are the 16 LSB of the SS\[31:0\] free-running down-counter. When BCD mode is selected (BIN=00): SS\[15:0\] is the value in the synchronous prescaler counter. The fraction of a second is given by the formula below: Second fraction = (PREDIV_S SS) / (PREDIV_S + 1) SS can be larger than PREDIV_S only after a shift operation. In that case, the correct time/date is one second less than as indicated by RTC_TR/RTC_DR.
4pub type SS_R = crate::FieldReader<u32>;
5impl R {
6    ///Bits 0:31 - Synchronous binary counter SS\[31:16\]: Synchronous binary counter MSB values When Binary or Mixed mode is selected (BIN = 01 or 10 or 11): SS\[31:16\] are the 16 MSB of the SS\[31:0\] free-running down-counter. When BCD mode is selected (BIN=00): SS\[31:16\] are forced by hardware to 0x0000. SS\[15:0\]: Sub second value/Synchronous binary counter LSB values When Binary mode is selected (BIN = 01 or 10 or 11): SS\[15:0\] are the 16 LSB of the SS\[31:0\] free-running down-counter. When BCD mode is selected (BIN=00): SS\[15:0\] is the value in the synchronous prescaler counter. The fraction of a second is given by the formula below: Second fraction = (PREDIV_S SS) / (PREDIV_S + 1) SS can be larger than PREDIV_S only after a shift operation. In that case, the correct time/date is one second less than as indicated by RTC_TR/RTC_DR.
7    #[inline(always)]
8    pub fn ss(&self) -> SS_R {
9        SS_R::new(self.bits)
10    }
11}
12impl core::fmt::Debug for R {
13    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
14        f.debug_struct("SSR").field("ss", &self.ss()).finish()
15    }
16}
17/**RTC sub second register
18
19You can [`read`](crate::Reg::read) this register and get [`ssr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
20
21See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H573.html#RTC:SSR)*/
22pub struct SSRrs;
23impl crate::RegisterSpec for SSRrs {
24    type Ux = u32;
25}
26///`read()` method returns [`ssr::R`](R) reader structure
27impl crate::Readable for SSRrs {}
28///`reset()` method sets SSR to value 0
29impl crate::Resettable for SSRrs {}
stm32h5/stm32h573/rtc/ssr.rs

stm32h5/stm32h573/rtc/
ssr.rs
