stm32h5/stm32h503/comp/
comp_sr.rs

1///Register `COMP_SR` reader
2pub type R = crate::R<COMP_SRrs>;
3///Field `C1VAL` reader - COMP Channel1 output status bit This bit is read-only. It reflects the current COMP Channel1 output taking into account POLARITY and BLANKING bits effect.
4pub type C1VAL_R = crate::BitReader;
5///Field `C1IF` reader - COMP Channel1 interrupt flag This bit is set by hardware when the COMP Channel1 output is set This bit is cleared by software writing 1 the CC1IF bit in the COMP_ICFR register.
6pub type C1IF_R = crate::BitReader;
7impl R {
8    ///Bit 0 - COMP Channel1 output status bit This bit is read-only. It reflects the current COMP Channel1 output taking into account POLARITY and BLANKING bits effect.
9    #[inline(always)]
10    pub fn c1val(&self) -> C1VAL_R {
11        C1VAL_R::new((self.bits & 1) != 0)
12    }
13    ///Bit 16 - COMP Channel1 interrupt flag This bit is set by hardware when the COMP Channel1 output is set This bit is cleared by software writing 1 the CC1IF bit in the COMP_ICFR register.
14    #[inline(always)]
15    pub fn c1if(&self) -> C1IF_R {
16        C1IF_R::new(((self.bits >> 16) & 1) != 0)
17    }
18}
19impl core::fmt::Debug for R {
20    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
21        f.debug_struct("COMP_SR")
22            .field("c1val", &self.c1val())
23            .field("c1if", &self.c1if())
24            .finish()
25    }
26}
27/**Comparator status register
28
29You can [`read`](crate::Reg::read) this register and get [`comp_sr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
30
31See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H503.html#COMP:COMP_SR)*/
32pub struct COMP_SRrs;
33impl crate::RegisterSpec for COMP_SRrs {
34    type Ux = u32;
35}
36///`read()` method returns [`comp_sr::R`](R) reader structure
37impl crate::Readable for COMP_SRrs {}
38///`reset()` method sets COMP_SR to value 0
39impl crate::Resettable for COMP_SRrs {}
stm32h5/stm32h503/comp/comp_sr.rs

stm32h5/stm32h503/comp/
comp_sr.rs
