stm32h5/stm32h563/
usart1.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    cr1: CR1,
5    cr2: CR2,
6    cr3: CR3,
7    brr: BRR,
8    gtpr: GTPR,
9    rtor: RTOR,
10    rqr: RQR,
11    isr: ISR,
12    icr: ICR,
13    rdr: RDR,
14    tdr: TDR,
15    presc: PRESC,
16}
17impl RegisterBlock {
18    #[doc = "0x00 - USART control register 1 \\[alternate\\]"]
19    #[inline(always)]
20    pub const fn cr1(&self) -> &CR1 {
21        &self.cr1
22    }
23    #[doc = "0x04 - USART control register 2"]
24    #[inline(always)]
25    pub const fn cr2(&self) -> &CR2 {
26        &self.cr2
27    }
28    #[doc = "0x08 - USART control register 3"]
29    #[inline(always)]
30    pub const fn cr3(&self) -> &CR3 {
31        &self.cr3
32    }
33    #[doc = "0x0c - USART baud rate register"]
34    #[inline(always)]
35    pub const fn brr(&self) -> &BRR {
36        &self.brr
37    }
38    #[doc = "0x10 - USART guard time and prescaler register"]
39    #[inline(always)]
40    pub const fn gtpr(&self) -> &GTPR {
41        &self.gtpr
42    }
43    #[doc = "0x14 - USART receiver timeout register"]
44    #[inline(always)]
45    pub const fn rtor(&self) -> &RTOR {
46        &self.rtor
47    }
48    #[doc = "0x18 - USART request register"]
49    #[inline(always)]
50    pub const fn rqr(&self) -> &RQR {
51        &self.rqr
52    }
53    #[doc = "0x1c - USART interrupt and status register"]
54    #[inline(always)]
55    pub const fn isr(&self) -> &ISR {
56        &self.isr
57    }
58    #[doc = "0x20 - USART interrupt flag clear register"]
59    #[inline(always)]
60    pub const fn icr(&self) -> &ICR {
61        &self.icr
62    }
63    #[doc = "0x24 - USART receive data register"]
64    #[inline(always)]
65    pub const fn rdr(&self) -> &RDR {
66        &self.rdr
67    }
68    #[doc = "0x28 - USART transmit data register"]
69    #[inline(always)]
70    pub const fn tdr(&self) -> &TDR {
71        &self.tdr
72    }
73    #[doc = "0x2c - USART prescaler register"]
74    #[inline(always)]
75    pub const fn presc(&self) -> &PRESC {
76        &self.presc
77    }
78}
79#[doc = "CR1 (rw) register accessor: USART control register 1 \\[alternate\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1`]
80module"]
81pub type CR1 = crate::Reg<cr1::CR1rs>;
82#[doc = "USART control register 1 \\[alternate\\]"]
83pub mod cr1;
84#[doc = "CR2 (rw) register accessor: USART control register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2`]
85module"]
86pub type CR2 = crate::Reg<cr2::CR2rs>;
87#[doc = "USART control register 2"]
88pub mod cr2;
89#[doc = "CR3 (rw) register accessor: USART control register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr3`]
90module"]
91pub type CR3 = crate::Reg<cr3::CR3rs>;
92#[doc = "USART control register 3"]
93pub mod cr3;
94#[doc = "BRR (rw) register accessor: USART baud rate register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brr`]
95module"]
96pub type BRR = crate::Reg<brr::BRRrs>;
97#[doc = "USART baud rate register"]
98pub mod brr;
99#[doc = "GTPR (rw) register accessor: USART guard time and prescaler register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gtpr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gtpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gtpr`]
100module"]
101pub type GTPR = crate::Reg<gtpr::GTPRrs>;
102#[doc = "USART guard time and prescaler register"]
103pub mod gtpr;
104#[doc = "RTOR (rw) register accessor: USART receiver timeout register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rtor::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rtor::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rtor`]
105module"]
106pub type RTOR = crate::Reg<rtor::RTORrs>;
107#[doc = "USART receiver timeout register"]
108pub mod rtor;
109#[doc = "RQR (w) register accessor: USART request register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rqr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rqr`]
110module"]
111pub type RQR = crate::Reg<rqr::RQRrs>;
112#[doc = "USART request register"]
113pub mod rqr;
114#[doc = "ISR (r) register accessor: USART interrupt and status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`isr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@isr`]
115module"]
116pub type ISR = crate::Reg<isr::ISRrs>;
117#[doc = "USART interrupt and status register"]
118pub mod isr;
119#[doc = "ICR (w) register accessor: USART interrupt flag clear register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icr`]
120module"]
121pub type ICR = crate::Reg<icr::ICRrs>;
122#[doc = "USART interrupt flag clear register"]
123pub mod icr;
124#[doc = "RDR (r) register accessor: USART receive data register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rdr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rdr`]
125module"]
126pub type RDR = crate::Reg<rdr::RDRrs>;
127#[doc = "USART receive data register"]
128pub mod rdr;
129#[doc = "TDR (rw) register accessor: USART transmit data register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tdr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tdr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tdr`]
130module"]
131pub type TDR = crate::Reg<tdr::TDRrs>;
132#[doc = "USART transmit data register"]
133pub mod tdr;
134#[doc = "PRESC (rw) register accessor: USART prescaler register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`presc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`presc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@presc`]
135module"]
136pub type PRESC = crate::Reg<presc::PRESCrs>;
137#[doc = "USART prescaler register"]
138pub mod presc;
stm32h5/stm32h563/usart1.rs

stm32h5/stm32h563/
usart1.rs
