stm32h5/stm32h563/rcc/
apb1lenr.rs

1#[doc = "Register `APB1LENR` reader"]
2pub type R = crate::R<APB1LENRrs>;
3#[doc = "Register `APB1LENR` writer"]
4pub type W = crate::W<APB1LENRrs>;
5#[doc = "Field `TIM2EN` reader - TIM2 clock enable Set and reset by software."]
6pub type TIM2EN_R = crate::BitReader<TIM2EN>;
7#[doc = "TIM2 clock enable Set and reset by software.\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum TIM2EN {
10    #[doc = "0: The selected clock is disabled"]
11    Disabled = 0,
12    #[doc = "1: The selected clock is enabled"]
13    Enabled = 1,
14}
15impl From<TIM2EN> for bool {
16    #[inline(always)]
17    fn from(variant: TIM2EN) -> Self {
18        variant as u8 != 0
19    }
20}
21impl TIM2EN_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> TIM2EN {
25        match self.bits {
26            false => TIM2EN::Disabled,
27            true => TIM2EN::Enabled,
28        }
29    }
30    #[doc = "The selected clock is disabled"]
31    #[inline(always)]
32    pub fn is_disabled(&self) -> bool {
33        *self == TIM2EN::Disabled
34    }
35    #[doc = "The selected clock is enabled"]
36    #[inline(always)]
37    pub fn is_enabled(&self) -> bool {
38        *self == TIM2EN::Enabled
39    }
40}
41#[doc = "Field `TIM2EN` writer - TIM2 clock enable Set and reset by software."]
42pub type TIM2EN_W<'a, REG> = crate::BitWriter<'a, REG, TIM2EN>;
43impl<'a, REG> TIM2EN_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "The selected clock is disabled"]
48    #[inline(always)]
49    pub fn disabled(self) -> &'a mut crate::W<REG> {
50        self.variant(TIM2EN::Disabled)
51    }
52    #[doc = "The selected clock is enabled"]
53    #[inline(always)]
54    pub fn enabled(self) -> &'a mut crate::W<REG> {
55        self.variant(TIM2EN::Enabled)
56    }
57}
58#[doc = "Field `TIM3EN` reader - TIM3 clock enable Set and reset by software."]
59pub use TIM2EN_R as TIM3EN_R;
60#[doc = "Field `TIM4EN` reader - TIM4 clock enable Set and reset by software."]
61pub use TIM2EN_R as TIM4EN_R;
62#[doc = "Field `TIM5EN` reader - TIM5 clock enable Set and reset by software."]
63pub use TIM2EN_R as TIM5EN_R;
64#[doc = "Field `TIM6EN` reader - TIM6 clock enable Set and reset by software."]
65pub use TIM2EN_R as TIM6EN_R;
66#[doc = "Field `TIM7EN` reader - TIM7 clock enable Set and reset by software."]
67pub use TIM2EN_R as TIM7EN_R;
68#[doc = "Field `TIM12EN` reader - TIM12 clock enable Set and reset by software."]
69pub use TIM2EN_R as TIM12EN_R;
70#[doc = "Field `TIM13EN` reader - TIM13 clock enable Set and reset by software."]
71pub use TIM2EN_R as TIM13EN_R;
72#[doc = "Field `TIM14EN` reader - TIM14 clock enable Set and reset by software."]
73pub use TIM2EN_R as TIM14EN_R;
74#[doc = "Field `WWDGEN` reader - WWDG clock enable Set and reset by software."]
75pub use TIM2EN_R as WWDGEN_R;
76#[doc = "Field `SPI2EN` reader - SPI2 clock enable Set and reset by software."]
77pub use TIM2EN_R as SPI2EN_R;
78#[doc = "Field `SPI3EN` reader - SPI3 clock enable Set and reset by software."]
79pub use TIM2EN_R as SPI3EN_R;
80#[doc = "Field `USART2EN` reader - USART2 clock enable Set and reset by software."]
81pub use TIM2EN_R as USART2EN_R;
82#[doc = "Field `USART3EN` reader - USART3 clock enable Set and reset by software."]
83pub use TIM2EN_R as USART3EN_R;
84#[doc = "Field `UART4EN` reader - UART4 clock enable Set and reset by software."]
85pub use TIM2EN_R as UART4EN_R;
86#[doc = "Field `UART5EN` reader - UART5 clock enable Set and reset by software."]
87pub use TIM2EN_R as UART5EN_R;
88#[doc = "Field `I2C1EN` reader - I2C1 clock enable Set and reset by software."]
89pub use TIM2EN_R as I2C1EN_R;
90#[doc = "Field `I2C2EN` reader - I2C2 clock enable Set and reset by software."]
91pub use TIM2EN_R as I2C2EN_R;
92#[doc = "Field `I3C1EN` reader - I3C1 clock enable Set and reset by software."]
93pub use TIM2EN_R as I3C1EN_R;
94#[doc = "Field `CRSEN` reader - CRS clock enable Set and reset by software."]
95pub use TIM2EN_R as CRSEN_R;
96#[doc = "Field `USART6EN` reader - USART6 clock enable Set and reset by software."]
97pub use TIM2EN_R as USART6EN_R;
98#[doc = "Field `USART10EN` reader - USART10 clock enable Set and reset by software."]
99pub use TIM2EN_R as USART10EN_R;
100#[doc = "Field `USART11EN` reader - USART11 clock enable"]
101pub use TIM2EN_R as USART11EN_R;
102#[doc = "Field `CECEN` reader - HDMI-CEC clock enable Set and reset by software."]
103pub use TIM2EN_R as CECEN_R;
104#[doc = "Field `UART7EN` reader - UART7 clock enable Set and reset by software."]
105pub use TIM2EN_R as UART7EN_R;
106#[doc = "Field `UART8EN` reader - UART8 clock enable Set and reset by software."]
107pub use TIM2EN_R as UART8EN_R;
108#[doc = "Field `TIM3EN` writer - TIM3 clock enable Set and reset by software."]
109pub use TIM2EN_W as TIM3EN_W;
110#[doc = "Field `TIM4EN` writer - TIM4 clock enable Set and reset by software."]
111pub use TIM2EN_W as TIM4EN_W;
112#[doc = "Field `TIM5EN` writer - TIM5 clock enable Set and reset by software."]
113pub use TIM2EN_W as TIM5EN_W;
114#[doc = "Field `TIM6EN` writer - TIM6 clock enable Set and reset by software."]
115pub use TIM2EN_W as TIM6EN_W;
116#[doc = "Field `TIM7EN` writer - TIM7 clock enable Set and reset by software."]
117pub use TIM2EN_W as TIM7EN_W;
118#[doc = "Field `TIM12EN` writer - TIM12 clock enable Set and reset by software."]
119pub use TIM2EN_W as TIM12EN_W;
120#[doc = "Field `TIM13EN` writer - TIM13 clock enable Set and reset by software."]
121pub use TIM2EN_W as TIM13EN_W;
122#[doc = "Field `TIM14EN` writer - TIM14 clock enable Set and reset by software."]
123pub use TIM2EN_W as TIM14EN_W;
124#[doc = "Field `WWDGEN` writer - WWDG clock enable Set and reset by software."]
125pub use TIM2EN_W as WWDGEN_W;
126#[doc = "Field `SPI2EN` writer - SPI2 clock enable Set and reset by software."]
127pub use TIM2EN_W as SPI2EN_W;
128#[doc = "Field `SPI3EN` writer - SPI3 clock enable Set and reset by software."]
129pub use TIM2EN_W as SPI3EN_W;
130#[doc = "Field `USART2EN` writer - USART2 clock enable Set and reset by software."]
131pub use TIM2EN_W as USART2EN_W;
132#[doc = "Field `USART3EN` writer - USART3 clock enable Set and reset by software."]
133pub use TIM2EN_W as USART3EN_W;
134#[doc = "Field `UART4EN` writer - UART4 clock enable Set and reset by software."]
135pub use TIM2EN_W as UART4EN_W;
136#[doc = "Field `UART5EN` writer - UART5 clock enable Set and reset by software."]
137pub use TIM2EN_W as UART5EN_W;
138#[doc = "Field `I2C1EN` writer - I2C1 clock enable Set and reset by software."]
139pub use TIM2EN_W as I2C1EN_W;
140#[doc = "Field `I2C2EN` writer - I2C2 clock enable Set and reset by software."]
141pub use TIM2EN_W as I2C2EN_W;
142#[doc = "Field `I3C1EN` writer - I3C1 clock enable Set and reset by software."]
143pub use TIM2EN_W as I3C1EN_W;
144#[doc = "Field `CRSEN` writer - CRS clock enable Set and reset by software."]
145pub use TIM2EN_W as CRSEN_W;
146#[doc = "Field `USART6EN` writer - USART6 clock enable Set and reset by software."]
147pub use TIM2EN_W as USART6EN_W;
148#[doc = "Field `USART10EN` writer - USART10 clock enable Set and reset by software."]
149pub use TIM2EN_W as USART10EN_W;
150#[doc = "Field `USART11EN` writer - USART11 clock enable"]
151pub use TIM2EN_W as USART11EN_W;
152#[doc = "Field `CECEN` writer - HDMI-CEC clock enable Set and reset by software."]
153pub use TIM2EN_W as CECEN_W;
154#[doc = "Field `UART7EN` writer - UART7 clock enable Set and reset by software."]
155pub use TIM2EN_W as UART7EN_W;
156#[doc = "Field `UART8EN` writer - UART8 clock enable Set and reset by software."]
157pub use TIM2EN_W as UART8EN_W;
158impl R {
159    #[doc = "Bit 0 - TIM2 clock enable Set and reset by software."]
160    #[inline(always)]
161    pub fn tim2en(&self) -> TIM2EN_R {
162        TIM2EN_R::new((self.bits & 1) != 0)
163    }
164    #[doc = "Bit 1 - TIM3 clock enable Set and reset by software."]
165    #[inline(always)]
166    pub fn tim3en(&self) -> TIM3EN_R {
167        TIM3EN_R::new(((self.bits >> 1) & 1) != 0)
168    }
169    #[doc = "Bit 2 - TIM4 clock enable Set and reset by software."]
170    #[inline(always)]
171    pub fn tim4en(&self) -> TIM4EN_R {
172        TIM4EN_R::new(((self.bits >> 2) & 1) != 0)
173    }
174    #[doc = "Bit 3 - TIM5 clock enable Set and reset by software."]
175    #[inline(always)]
176    pub fn tim5en(&self) -> TIM5EN_R {
177        TIM5EN_R::new(((self.bits >> 3) & 1) != 0)
178    }
179    #[doc = "Bit 4 - TIM6 clock enable Set and reset by software."]
180    #[inline(always)]
181    pub fn tim6en(&self) -> TIM6EN_R {
182        TIM6EN_R::new(((self.bits >> 4) & 1) != 0)
183    }
184    #[doc = "Bit 5 - TIM7 clock enable Set and reset by software."]
185    #[inline(always)]
186    pub fn tim7en(&self) -> TIM7EN_R {
187        TIM7EN_R::new(((self.bits >> 5) & 1) != 0)
188    }
189    #[doc = "Bit 6 - TIM12 clock enable Set and reset by software."]
190    #[inline(always)]
191    pub fn tim12en(&self) -> TIM12EN_R {
192        TIM12EN_R::new(((self.bits >> 6) & 1) != 0)
193    }
194    #[doc = "Bit 7 - TIM13 clock enable Set and reset by software."]
195    #[inline(always)]
196    pub fn tim13en(&self) -> TIM13EN_R {
197        TIM13EN_R::new(((self.bits >> 7) & 1) != 0)
198    }
199    #[doc = "Bit 8 - TIM14 clock enable Set and reset by software."]
200    #[inline(always)]
201    pub fn tim14en(&self) -> TIM14EN_R {
202        TIM14EN_R::new(((self.bits >> 8) & 1) != 0)
203    }
204    #[doc = "Bit 11 - WWDG clock enable Set and reset by software."]
205    #[inline(always)]
206    pub fn wwdgen(&self) -> WWDGEN_R {
207        WWDGEN_R::new(((self.bits >> 11) & 1) != 0)
208    }
209    #[doc = "Bit 14 - SPI2 clock enable Set and reset by software."]
210    #[inline(always)]
211    pub fn spi2en(&self) -> SPI2EN_R {
212        SPI2EN_R::new(((self.bits >> 14) & 1) != 0)
213    }
214    #[doc = "Bit 15 - SPI3 clock enable Set and reset by software."]
215    #[inline(always)]
216    pub fn spi3en(&self) -> SPI3EN_R {
217        SPI3EN_R::new(((self.bits >> 15) & 1) != 0)
218    }
219    #[doc = "Bit 17 - USART2 clock enable Set and reset by software."]
220    #[inline(always)]
221    pub fn usart2en(&self) -> USART2EN_R {
222        USART2EN_R::new(((self.bits >> 17) & 1) != 0)
223    }
224    #[doc = "Bit 18 - USART3 clock enable Set and reset by software."]
225    #[inline(always)]
226    pub fn usart3en(&self) -> USART3EN_R {
227        USART3EN_R::new(((self.bits >> 18) & 1) != 0)
228    }
229    #[doc = "Bit 19 - UART4 clock enable Set and reset by software."]
230    #[inline(always)]
231    pub fn uart4en(&self) -> UART4EN_R {
232        UART4EN_R::new(((self.bits >> 19) & 1) != 0)
233    }
234    #[doc = "Bit 20 - UART5 clock enable Set and reset by software."]
235    #[inline(always)]
236    pub fn uart5en(&self) -> UART5EN_R {
237        UART5EN_R::new(((self.bits >> 20) & 1) != 0)
238    }
239    #[doc = "Bit 21 - I2C1 clock enable Set and reset by software."]
240    #[inline(always)]
241    pub fn i2c1en(&self) -> I2C1EN_R {
242        I2C1EN_R::new(((self.bits >> 21) & 1) != 0)
243    }
244    #[doc = "Bit 22 - I2C2 clock enable Set and reset by software."]
245    #[inline(always)]
246    pub fn i2c2en(&self) -> I2C2EN_R {
247        I2C2EN_R::new(((self.bits >> 22) & 1) != 0)
248    }
249    #[doc = "Bit 23 - I3C1 clock enable Set and reset by software."]
250    #[inline(always)]
251    pub fn i3c1en(&self) -> I3C1EN_R {
252        I3C1EN_R::new(((self.bits >> 23) & 1) != 0)
253    }
254    #[doc = "Bit 24 - CRS clock enable Set and reset by software."]
255    #[inline(always)]
256    pub fn crsen(&self) -> CRSEN_R {
257        CRSEN_R::new(((self.bits >> 24) & 1) != 0)
258    }
259    #[doc = "Bit 25 - USART6 clock enable Set and reset by software."]
260    #[inline(always)]
261    pub fn usart6en(&self) -> USART6EN_R {
262        USART6EN_R::new(((self.bits >> 25) & 1) != 0)
263    }
264    #[doc = "Bit 26 - USART10 clock enable Set and reset by software."]
265    #[inline(always)]
266    pub fn usart10en(&self) -> USART10EN_R {
267        USART10EN_R::new(((self.bits >> 26) & 1) != 0)
268    }
269    #[doc = "Bit 27 - USART11 clock enable"]
270    #[inline(always)]
271    pub fn usart11en(&self) -> USART11EN_R {
272        USART11EN_R::new(((self.bits >> 27) & 1) != 0)
273    }
274    #[doc = "Bit 28 - HDMI-CEC clock enable Set and reset by software."]
275    #[inline(always)]
276    pub fn cecen(&self) -> CECEN_R {
277        CECEN_R::new(((self.bits >> 28) & 1) != 0)
278    }
279    #[doc = "Bit 30 - UART7 clock enable Set and reset by software."]
280    #[inline(always)]
281    pub fn uart7en(&self) -> UART7EN_R {
282        UART7EN_R::new(((self.bits >> 30) & 1) != 0)
283    }
284    #[doc = "Bit 31 - UART8 clock enable Set and reset by software."]
285    #[inline(always)]
286    pub fn uart8en(&self) -> UART8EN_R {
287        UART8EN_R::new(((self.bits >> 31) & 1) != 0)
288    }
289}
290impl W {
291    #[doc = "Bit 0 - TIM2 clock enable Set and reset by software."]
292    #[inline(always)]
293    #[must_use]
294    pub fn tim2en(&mut self) -> TIM2EN_W<APB1LENRrs> {
295        TIM2EN_W::new(self, 0)
296    }
297    #[doc = "Bit 1 - TIM3 clock enable Set and reset by software."]
298    #[inline(always)]
299    #[must_use]
300    pub fn tim3en(&mut self) -> TIM3EN_W<APB1LENRrs> {
301        TIM3EN_W::new(self, 1)
302    }
303    #[doc = "Bit 2 - TIM4 clock enable Set and reset by software."]
304    #[inline(always)]
305    #[must_use]
306    pub fn tim4en(&mut self) -> TIM4EN_W<APB1LENRrs> {
307        TIM4EN_W::new(self, 2)
308    }
309    #[doc = "Bit 3 - TIM5 clock enable Set and reset by software."]
310    #[inline(always)]
311    #[must_use]
312    pub fn tim5en(&mut self) -> TIM5EN_W<APB1LENRrs> {
313        TIM5EN_W::new(self, 3)
314    }
315    #[doc = "Bit 4 - TIM6 clock enable Set and reset by software."]
316    #[inline(always)]
317    #[must_use]
318    pub fn tim6en(&mut self) -> TIM6EN_W<APB1LENRrs> {
319        TIM6EN_W::new(self, 4)
320    }
321    #[doc = "Bit 5 - TIM7 clock enable Set and reset by software."]
322    #[inline(always)]
323    #[must_use]
324    pub fn tim7en(&mut self) -> TIM7EN_W<APB1LENRrs> {
325        TIM7EN_W::new(self, 5)
326    }
327    #[doc = "Bit 6 - TIM12 clock enable Set and reset by software."]
328    #[inline(always)]
329    #[must_use]
330    pub fn tim12en(&mut self) -> TIM12EN_W<APB1LENRrs> {
331        TIM12EN_W::new(self, 6)
332    }
333    #[doc = "Bit 7 - TIM13 clock enable Set and reset by software."]
334    #[inline(always)]
335    #[must_use]
336    pub fn tim13en(&mut self) -> TIM13EN_W<APB1LENRrs> {
337        TIM13EN_W::new(self, 7)
338    }
339    #[doc = "Bit 8 - TIM14 clock enable Set and reset by software."]
340    #[inline(always)]
341    #[must_use]
342    pub fn tim14en(&mut self) -> TIM14EN_W<APB1LENRrs> {
343        TIM14EN_W::new(self, 8)
344    }
345    #[doc = "Bit 11 - WWDG clock enable Set and reset by software."]
346    #[inline(always)]
347    #[must_use]
348    pub fn wwdgen(&mut self) -> WWDGEN_W<APB1LENRrs> {
349        WWDGEN_W::new(self, 11)
350    }
351    #[doc = "Bit 14 - SPI2 clock enable Set and reset by software."]
352    #[inline(always)]
353    #[must_use]
354    pub fn spi2en(&mut self) -> SPI2EN_W<APB1LENRrs> {
355        SPI2EN_W::new(self, 14)
356    }
357    #[doc = "Bit 15 - SPI3 clock enable Set and reset by software."]
358    #[inline(always)]
359    #[must_use]
360    pub fn spi3en(&mut self) -> SPI3EN_W<APB1LENRrs> {
361        SPI3EN_W::new(self, 15)
362    }
363    #[doc = "Bit 17 - USART2 clock enable Set and reset by software."]
364    #[inline(always)]
365    #[must_use]
366    pub fn usart2en(&mut self) -> USART2EN_W<APB1LENRrs> {
367        USART2EN_W::new(self, 17)
368    }
369    #[doc = "Bit 18 - USART3 clock enable Set and reset by software."]
370    #[inline(always)]
371    #[must_use]
372    pub fn usart3en(&mut self) -> USART3EN_W<APB1LENRrs> {
373        USART3EN_W::new(self, 18)
374    }
375    #[doc = "Bit 19 - UART4 clock enable Set and reset by software."]
376    #[inline(always)]
377    #[must_use]
378    pub fn uart4en(&mut self) -> UART4EN_W<APB1LENRrs> {
379        UART4EN_W::new(self, 19)
380    }
381    #[doc = "Bit 20 - UART5 clock enable Set and reset by software."]
382    #[inline(always)]
383    #[must_use]
384    pub fn uart5en(&mut self) -> UART5EN_W<APB1LENRrs> {
385        UART5EN_W::new(self, 20)
386    }
387    #[doc = "Bit 21 - I2C1 clock enable Set and reset by software."]
388    #[inline(always)]
389    #[must_use]
390    pub fn i2c1en(&mut self) -> I2C1EN_W<APB1LENRrs> {
391        I2C1EN_W::new(self, 21)
392    }
393    #[doc = "Bit 22 - I2C2 clock enable Set and reset by software."]
394    #[inline(always)]
395    #[must_use]
396    pub fn i2c2en(&mut self) -> I2C2EN_W<APB1LENRrs> {
397        I2C2EN_W::new(self, 22)
398    }
399    #[doc = "Bit 23 - I3C1 clock enable Set and reset by software."]
400    #[inline(always)]
401    #[must_use]
402    pub fn i3c1en(&mut self) -> I3C1EN_W<APB1LENRrs> {
403        I3C1EN_W::new(self, 23)
404    }
405    #[doc = "Bit 24 - CRS clock enable Set and reset by software."]
406    #[inline(always)]
407    #[must_use]
408    pub fn crsen(&mut self) -> CRSEN_W<APB1LENRrs> {
409        CRSEN_W::new(self, 24)
410    }
411    #[doc = "Bit 25 - USART6 clock enable Set and reset by software."]
412    #[inline(always)]
413    #[must_use]
414    pub fn usart6en(&mut self) -> USART6EN_W<APB1LENRrs> {
415        USART6EN_W::new(self, 25)
416    }
417    #[doc = "Bit 26 - USART10 clock enable Set and reset by software."]
418    #[inline(always)]
419    #[must_use]
420    pub fn usart10en(&mut self) -> USART10EN_W<APB1LENRrs> {
421        USART10EN_W::new(self, 26)
422    }
423    #[doc = "Bit 27 - USART11 clock enable"]
424    #[inline(always)]
425    #[must_use]
426    pub fn usart11en(&mut self) -> USART11EN_W<APB1LENRrs> {
427        USART11EN_W::new(self, 27)
428    }
429    #[doc = "Bit 28 - HDMI-CEC clock enable Set and reset by software."]
430    #[inline(always)]
431    #[must_use]
432    pub fn cecen(&mut self) -> CECEN_W<APB1LENRrs> {
433        CECEN_W::new(self, 28)
434    }
435    #[doc = "Bit 30 - UART7 clock enable Set and reset by software."]
436    #[inline(always)]
437    #[must_use]
438    pub fn uart7en(&mut self) -> UART7EN_W<APB1LENRrs> {
439        UART7EN_W::new(self, 30)
440    }
441    #[doc = "Bit 31 - UART8 clock enable Set and reset by software."]
442    #[inline(always)]
443    #[must_use]
444    pub fn uart8en(&mut self) -> UART8EN_W<APB1LENRrs> {
445        UART8EN_W::new(self, 31)
446    }
447    #[doc = r" Writes raw bits to the register."]
448    #[doc = r""]
449    #[doc = r" # Safety"]
450    #[doc = r""]
451    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
452    #[inline(always)]
453    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
454        self.bits = bits;
455        self
456    }
457}
458#[doc = "RCC APB1 peripheral clock register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`apb1lenr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`apb1lenr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
459pub struct APB1LENRrs;
460impl crate::RegisterSpec for APB1LENRrs {
461    type Ux = u32;
462}
463#[doc = "`read()` method returns [`apb1lenr::R`](R) reader structure"]
464impl crate::Readable for APB1LENRrs {}
465#[doc = "`write(|w| ..)` method takes [`apb1lenr::W`](W) writer structure"]
466impl crate::Writable for APB1LENRrs {
467    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
468    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
469}
470#[doc = "`reset()` method sets APB1LENR to value 0"]
471impl crate::Resettable for APB1LENRrs {
472    const RESET_VALUE: u32 = 0;
473}