pub struct TEST_SPEC;
Expand description
Write access to the Test Register has to be enabled by setting bit CCCR[TEST] to 1 . All Test Register functions are set to their reset values when bit CCCR[TEST] is reset. Loop Back mode and software control of Tx pin FDCANx_TX are hardware test modes. Programming TX differently from 00 may disturb the message transfer on the CAN bus.
This register you can read
, write_with_zero
, reset
, write
, modify
. See API.
For information about available fields see test module
Trait Implementations
sourceimpl RegisterSpec for TEST_SPEC
impl RegisterSpec for TEST_SPEC
sourceimpl Resettable for TEST_SPEC
impl Resettable for TEST_SPEC
reset()
method sets TEST to value 0
sourcefn reset_value() -> Self::Ux
fn reset_value() -> Self::Ux
Reset value of the register.
Auto Trait Implementations
impl RefUnwindSafe for TEST_SPEC
impl Send for TEST_SPEC
impl Sync for TEST_SPEC
impl Unpin for TEST_SPEC
impl UnwindSafe for TEST_SPEC
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more