stm32g4/stm32g484/rcc/
apb2enr.rs

1#[doc = "Register `APB2ENR` reader"]
2pub struct R(crate::R<APB2ENR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<APB2ENR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<APB2ENR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<APB2ENR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `APB2ENR` writer"]
17pub struct W(crate::W<APB2ENR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<APB2ENR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<APB2ENR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<APB2ENR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "SYSCFG clock enable\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum SYSCFGEN_A {
40    #[doc = "0: The selected clock is disabled"]
41    Disabled = 0,
42    #[doc = "1: The selected clock is enabled"]
43    Enabled = 1,
44}
45impl From<SYSCFGEN_A> for bool {
46    #[inline(always)]
47    fn from(variant: SYSCFGEN_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `SYSCFGEN` reader - SYSCFG clock enable"]
52pub type SYSCFGEN_R = crate::BitReader<SYSCFGEN_A>;
53impl SYSCFGEN_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> SYSCFGEN_A {
57        match self.bits {
58            false => SYSCFGEN_A::Disabled,
59            true => SYSCFGEN_A::Enabled,
60        }
61    }
62    #[doc = "Checks if the value of the field is `Disabled`"]
63    #[inline(always)]
64    pub fn is_disabled(&self) -> bool {
65        *self == SYSCFGEN_A::Disabled
66    }
67    #[doc = "Checks if the value of the field is `Enabled`"]
68    #[inline(always)]
69    pub fn is_enabled(&self) -> bool {
70        *self == SYSCFGEN_A::Enabled
71    }
72}
73#[doc = "Field `SYSCFGEN` writer - SYSCFG clock enable"]
74pub type SYSCFGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, APB2ENR_SPEC, SYSCFGEN_A, O>;
75impl<'a, const O: u8> SYSCFGEN_W<'a, O> {
76    #[doc = "The selected clock is disabled"]
77    #[inline(always)]
78    pub fn disabled(self) -> &'a mut W {
79        self.variant(SYSCFGEN_A::Disabled)
80    }
81    #[doc = "The selected clock is enabled"]
82    #[inline(always)]
83    pub fn enabled(self) -> &'a mut W {
84        self.variant(SYSCFGEN_A::Enabled)
85    }
86}
87#[doc = "TIM1 timer clock enable"]
88pub use SYSCFGEN_A as TIM1EN_A;
89#[doc = "SPI1 clock enable"]
90pub use SYSCFGEN_A as SPI1EN_A;
91#[doc = "TIM8 timer clock enable"]
92pub use SYSCFGEN_A as TIM8EN_A;
93#[doc = "USART1clock enable"]
94pub use SYSCFGEN_A as USART1EN_A;
95#[doc = "SPI 4 clock enable"]
96pub use SYSCFGEN_A as SPI4EN_A;
97#[doc = "TIM15 timer clock enable"]
98pub use SYSCFGEN_A as TIM15EN_A;
99#[doc = "TIM16 timer clock enable"]
100pub use SYSCFGEN_A as TIM16EN_A;
101#[doc = "TIM17 timer clock enable"]
102pub use SYSCFGEN_A as TIM17EN_A;
103#[doc = "Timer 20 clock enable"]
104pub use SYSCFGEN_A as TIM20EN_A;
105#[doc = "SAI1 clock enable"]
106pub use SYSCFGEN_A as SAI1EN_A;
107#[doc = "HRTIMER clock enable"]
108pub use SYSCFGEN_A as HRTIM1EN_A;
109#[doc = "Field `TIM1EN` reader - TIM1 timer clock enable"]
110pub use SYSCFGEN_R as TIM1EN_R;
111#[doc = "Field `SPI1EN` reader - SPI1 clock enable"]
112pub use SYSCFGEN_R as SPI1EN_R;
113#[doc = "Field `TIM8EN` reader - TIM8 timer clock enable"]
114pub use SYSCFGEN_R as TIM8EN_R;
115#[doc = "Field `USART1EN` reader - USART1clock enable"]
116pub use SYSCFGEN_R as USART1EN_R;
117#[doc = "Field `SPI4EN` reader - SPI 4 clock enable"]
118pub use SYSCFGEN_R as SPI4EN_R;
119#[doc = "Field `TIM15EN` reader - TIM15 timer clock enable"]
120pub use SYSCFGEN_R as TIM15EN_R;
121#[doc = "Field `TIM16EN` reader - TIM16 timer clock enable"]
122pub use SYSCFGEN_R as TIM16EN_R;
123#[doc = "Field `TIM17EN` reader - TIM17 timer clock enable"]
124pub use SYSCFGEN_R as TIM17EN_R;
125#[doc = "Field `TIM20EN` reader - Timer 20 clock enable"]
126pub use SYSCFGEN_R as TIM20EN_R;
127#[doc = "Field `SAI1EN` reader - SAI1 clock enable"]
128pub use SYSCFGEN_R as SAI1EN_R;
129#[doc = "Field `HRTIM1EN` reader - HRTIMER clock enable"]
130pub use SYSCFGEN_R as HRTIM1EN_R;
131#[doc = "Field `TIM1EN` writer - TIM1 timer clock enable"]
132pub use SYSCFGEN_W as TIM1EN_W;
133#[doc = "Field `SPI1EN` writer - SPI1 clock enable"]
134pub use SYSCFGEN_W as SPI1EN_W;
135#[doc = "Field `TIM8EN` writer - TIM8 timer clock enable"]
136pub use SYSCFGEN_W as TIM8EN_W;
137#[doc = "Field `USART1EN` writer - USART1clock enable"]
138pub use SYSCFGEN_W as USART1EN_W;
139#[doc = "Field `SPI4EN` writer - SPI 4 clock enable"]
140pub use SYSCFGEN_W as SPI4EN_W;
141#[doc = "Field `TIM15EN` writer - TIM15 timer clock enable"]
142pub use SYSCFGEN_W as TIM15EN_W;
143#[doc = "Field `TIM16EN` writer - TIM16 timer clock enable"]
144pub use SYSCFGEN_W as TIM16EN_W;
145#[doc = "Field `TIM17EN` writer - TIM17 timer clock enable"]
146pub use SYSCFGEN_W as TIM17EN_W;
147#[doc = "Field `TIM20EN` writer - Timer 20 clock enable"]
148pub use SYSCFGEN_W as TIM20EN_W;
149#[doc = "Field `SAI1EN` writer - SAI1 clock enable"]
150pub use SYSCFGEN_W as SAI1EN_W;
151#[doc = "Field `HRTIM1EN` writer - HRTIMER clock enable"]
152pub use SYSCFGEN_W as HRTIM1EN_W;
153impl R {
154    #[doc = "Bit 0 - SYSCFG clock enable"]
155    #[inline(always)]
156    pub fn syscfgen(&self) -> SYSCFGEN_R {
157        SYSCFGEN_R::new((self.bits & 1) != 0)
158    }
159    #[doc = "Bit 11 - TIM1 timer clock enable"]
160    #[inline(always)]
161    pub fn tim1en(&self) -> TIM1EN_R {
162        TIM1EN_R::new(((self.bits >> 11) & 1) != 0)
163    }
164    #[doc = "Bit 12 - SPI1 clock enable"]
165    #[inline(always)]
166    pub fn spi1en(&self) -> SPI1EN_R {
167        SPI1EN_R::new(((self.bits >> 12) & 1) != 0)
168    }
169    #[doc = "Bit 13 - TIM8 timer clock enable"]
170    #[inline(always)]
171    pub fn tim8en(&self) -> TIM8EN_R {
172        TIM8EN_R::new(((self.bits >> 13) & 1) != 0)
173    }
174    #[doc = "Bit 14 - USART1clock enable"]
175    #[inline(always)]
176    pub fn usart1en(&self) -> USART1EN_R {
177        USART1EN_R::new(((self.bits >> 14) & 1) != 0)
178    }
179    #[doc = "Bit 15 - SPI 4 clock enable"]
180    #[inline(always)]
181    pub fn spi4en(&self) -> SPI4EN_R {
182        SPI4EN_R::new(((self.bits >> 15) & 1) != 0)
183    }
184    #[doc = "Bit 16 - TIM15 timer clock enable"]
185    #[inline(always)]
186    pub fn tim15en(&self) -> TIM15EN_R {
187        TIM15EN_R::new(((self.bits >> 16) & 1) != 0)
188    }
189    #[doc = "Bit 17 - TIM16 timer clock enable"]
190    #[inline(always)]
191    pub fn tim16en(&self) -> TIM16EN_R {
192        TIM16EN_R::new(((self.bits >> 17) & 1) != 0)
193    }
194    #[doc = "Bit 18 - TIM17 timer clock enable"]
195    #[inline(always)]
196    pub fn tim17en(&self) -> TIM17EN_R {
197        TIM17EN_R::new(((self.bits >> 18) & 1) != 0)
198    }
199    #[doc = "Bit 20 - Timer 20 clock enable"]
200    #[inline(always)]
201    pub fn tim20en(&self) -> TIM20EN_R {
202        TIM20EN_R::new(((self.bits >> 20) & 1) != 0)
203    }
204    #[doc = "Bit 21 - SAI1 clock enable"]
205    #[inline(always)]
206    pub fn sai1en(&self) -> SAI1EN_R {
207        SAI1EN_R::new(((self.bits >> 21) & 1) != 0)
208    }
209    #[doc = "Bit 26 - HRTIMER clock enable"]
210    #[inline(always)]
211    pub fn hrtim1en(&self) -> HRTIM1EN_R {
212        HRTIM1EN_R::new(((self.bits >> 26) & 1) != 0)
213    }
214}
215impl W {
216    #[doc = "Bit 0 - SYSCFG clock enable"]
217    #[inline(always)]
218    pub fn syscfgen(&mut self) -> SYSCFGEN_W<0> {
219        SYSCFGEN_W::new(self)
220    }
221    #[doc = "Bit 11 - TIM1 timer clock enable"]
222    #[inline(always)]
223    pub fn tim1en(&mut self) -> TIM1EN_W<11> {
224        TIM1EN_W::new(self)
225    }
226    #[doc = "Bit 12 - SPI1 clock enable"]
227    #[inline(always)]
228    pub fn spi1en(&mut self) -> SPI1EN_W<12> {
229        SPI1EN_W::new(self)
230    }
231    #[doc = "Bit 13 - TIM8 timer clock enable"]
232    #[inline(always)]
233    pub fn tim8en(&mut self) -> TIM8EN_W<13> {
234        TIM8EN_W::new(self)
235    }
236    #[doc = "Bit 14 - USART1clock enable"]
237    #[inline(always)]
238    pub fn usart1en(&mut self) -> USART1EN_W<14> {
239        USART1EN_W::new(self)
240    }
241    #[doc = "Bit 15 - SPI 4 clock enable"]
242    #[inline(always)]
243    pub fn spi4en(&mut self) -> SPI4EN_W<15> {
244        SPI4EN_W::new(self)
245    }
246    #[doc = "Bit 16 - TIM15 timer clock enable"]
247    #[inline(always)]
248    pub fn tim15en(&mut self) -> TIM15EN_W<16> {
249        TIM15EN_W::new(self)
250    }
251    #[doc = "Bit 17 - TIM16 timer clock enable"]
252    #[inline(always)]
253    pub fn tim16en(&mut self) -> TIM16EN_W<17> {
254        TIM16EN_W::new(self)
255    }
256    #[doc = "Bit 18 - TIM17 timer clock enable"]
257    #[inline(always)]
258    pub fn tim17en(&mut self) -> TIM17EN_W<18> {
259        TIM17EN_W::new(self)
260    }
261    #[doc = "Bit 20 - Timer 20 clock enable"]
262    #[inline(always)]
263    pub fn tim20en(&mut self) -> TIM20EN_W<20> {
264        TIM20EN_W::new(self)
265    }
266    #[doc = "Bit 21 - SAI1 clock enable"]
267    #[inline(always)]
268    pub fn sai1en(&mut self) -> SAI1EN_W<21> {
269        SAI1EN_W::new(self)
270    }
271    #[doc = "Bit 26 - HRTIMER clock enable"]
272    #[inline(always)]
273    pub fn hrtim1en(&mut self) -> HRTIM1EN_W<26> {
274        HRTIM1EN_W::new(self)
275    }
276    #[doc = "Writes raw bits to the register."]
277    #[inline(always)]
278    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
279        self.0.bits(bits);
280        self
281    }
282}
283#[doc = "APB2ENR\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb2enr](index.html) module"]
284pub struct APB2ENR_SPEC;
285impl crate::RegisterSpec for APB2ENR_SPEC {
286    type Ux = u32;
287}
288#[doc = "`read()` method returns [apb2enr::R](R) reader structure"]
289impl crate::Readable for APB2ENR_SPEC {
290    type Reader = R;
291}
292#[doc = "`write(|w| ..)` method takes [apb2enr::W](W) writer structure"]
293impl crate::Writable for APB2ENR_SPEC {
294    type Writer = W;
295}
296#[doc = "`reset()` method sets APB2ENR to value 0"]
297impl crate::Resettable for APB2ENR_SPEC {
298    #[inline(always)]
299    fn reset_value() -> Self::Ux {
300        0
301    }
302}
stm32g4/stm32g484/rcc/apb2enr.rs

stm32g4/stm32g484/rcc/
apb2enr.rs
