stm32g4/stm32g484/hrtim_tima/
timacr2.rs1#[doc = "Register `TIMACR2` reader"]
2pub struct R(crate::R<TIMACR2_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<TIMACR2_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<TIMACR2_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<TIMACR2_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `TIMACR2` writer"]
17pub struct W(crate::W<TIMACR2_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<TIMACR2_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<TIMACR2_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<TIMACR2_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `TRGHLF` reader - Triggered-half mode"]
38pub type TRGHLF_R = crate::BitReader<bool>;
39#[doc = "Field `TRGHLF` writer - Triggered-half mode"]
40pub type TRGHLF_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMACR2_SPEC, bool, O>;
41#[doc = "Field `GTCMP3` reader - Greater than Compare 3 PWM mode"]
42pub type GTCMP3_R = crate::BitReader<bool>;
43#[doc = "Field `GTCMP3` writer - Greater than Compare 3 PWM mode"]
44pub type GTCMP3_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMACR2_SPEC, bool, O>;
45#[doc = "Field `GTCMP1` reader - Greater than Compare 1 PWM mode"]
46pub type GTCMP1_R = crate::BitReader<bool>;
47#[doc = "Field `GTCMP1` writer - Greater than Compare 1 PWM mode"]
48pub type GTCMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMACR2_SPEC, bool, O>;
49#[doc = "Field `FEROM` reader - Fault and Event Roll-Over Mode"]
50pub type FEROM_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `FEROM` writer - Fault and Event Roll-Over Mode"]
52pub type FEROM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMACR2_SPEC, u8, u8, 2, O>;
53#[doc = "Field `BMROM` reader - Burst Mode Roll-Over Mode"]
54pub type BMROM_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `BMROM` writer - Burst Mode Roll-Over Mode"]
56pub type BMROM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMACR2_SPEC, u8, u8, 2, O>;
57#[doc = "Field `ADROM` reader - ADC Roll-Over Mode"]
58pub type ADROM_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `ADROM` writer - ADC Roll-Over Mode"]
60pub type ADROM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMACR2_SPEC, u8, u8, 2, O>;
61#[doc = "Field `OUTROM` reader - Output Roll-Over Mode"]
62pub type OUTROM_R = crate::FieldReader<u8, u8>;
63#[doc = "Field `OUTROM` writer - Output Roll-Over Mode"]
64pub type OUTROM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMACR2_SPEC, u8, u8, 2, O>;
65#[doc = "Field `ROM` reader - Roll-Over Mode"]
66pub type ROM_R = crate::FieldReader<u8, u8>;
67#[doc = "Field `ROM` writer - Roll-Over Mode"]
68pub type ROM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMACR2_SPEC, u8, u8, 2, O>;
69#[doc = "Field `UDM` reader - Up-Down Mode"]
70pub type UDM_R = crate::BitReader<bool>;
71#[doc = "Field `UDM` writer - Up-Down Mode"]
72pub type UDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMACR2_SPEC, bool, O>;
73#[doc = "Field `DCDR` reader - Dual Channel DAC Reset trigger"]
74pub type DCDR_R = crate::BitReader<bool>;
75#[doc = "Field `DCDR` writer - Dual Channel DAC Reset trigger"]
76pub type DCDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMACR2_SPEC, bool, O>;
77#[doc = "Field `DCDS` reader - Dual Channel DAC Step trigger"]
78pub type DCDS_R = crate::BitReader<bool>;
79#[doc = "Field `DCDS` writer - Dual Channel DAC Step trigger"]
80pub type DCDS_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMACR2_SPEC, bool, O>;
81#[doc = "Field `DCDE` reader - Dual Channel DAC trigger enable"]
82pub type DCDE_R = crate::BitReader<bool>;
83#[doc = "Field `DCDE` writer - Dual Channel DAC trigger enable"]
84pub type DCDE_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMACR2_SPEC, bool, O>;
85impl R {
86 #[doc = "Bit 20 - Triggered-half mode"]
87 #[inline(always)]
88 pub fn trghlf(&self) -> TRGHLF_R {
89 TRGHLF_R::new(((self.bits >> 20) & 1) != 0)
90 }
91 #[doc = "Bit 17 - Greater than Compare 3 PWM mode"]
92 #[inline(always)]
93 pub fn gtcmp3(&self) -> GTCMP3_R {
94 GTCMP3_R::new(((self.bits >> 17) & 1) != 0)
95 }
96 #[doc = "Bit 16 - Greater than Compare 1 PWM mode"]
97 #[inline(always)]
98 pub fn gtcmp1(&self) -> GTCMP1_R {
99 GTCMP1_R::new(((self.bits >> 16) & 1) != 0)
100 }
101 #[doc = "Bits 14:15 - Fault and Event Roll-Over Mode"]
102 #[inline(always)]
103 pub fn ferom(&self) -> FEROM_R {
104 FEROM_R::new(((self.bits >> 14) & 3) as u8)
105 }
106 #[doc = "Bits 12:13 - Burst Mode Roll-Over Mode"]
107 #[inline(always)]
108 pub fn bmrom(&self) -> BMROM_R {
109 BMROM_R::new(((self.bits >> 12) & 3) as u8)
110 }
111 #[doc = "Bits 10:11 - ADC Roll-Over Mode"]
112 #[inline(always)]
113 pub fn adrom(&self) -> ADROM_R {
114 ADROM_R::new(((self.bits >> 10) & 3) as u8)
115 }
116 #[doc = "Bits 8:9 - Output Roll-Over Mode"]
117 #[inline(always)]
118 pub fn outrom(&self) -> OUTROM_R {
119 OUTROM_R::new(((self.bits >> 8) & 3) as u8)
120 }
121 #[doc = "Bits 6:7 - Roll-Over Mode"]
122 #[inline(always)]
123 pub fn rom(&self) -> ROM_R {
124 ROM_R::new(((self.bits >> 6) & 3) as u8)
125 }
126 #[doc = "Bit 4 - Up-Down Mode"]
127 #[inline(always)]
128 pub fn udm(&self) -> UDM_R {
129 UDM_R::new(((self.bits >> 4) & 1) != 0)
130 }
131 #[doc = "Bit 2 - Dual Channel DAC Reset trigger"]
132 #[inline(always)]
133 pub fn dcdr(&self) -> DCDR_R {
134 DCDR_R::new(((self.bits >> 2) & 1) != 0)
135 }
136 #[doc = "Bit 1 - Dual Channel DAC Step trigger"]
137 #[inline(always)]
138 pub fn dcds(&self) -> DCDS_R {
139 DCDS_R::new(((self.bits >> 1) & 1) != 0)
140 }
141 #[doc = "Bit 0 - Dual Channel DAC trigger enable"]
142 #[inline(always)]
143 pub fn dcde(&self) -> DCDE_R {
144 DCDE_R::new((self.bits & 1) != 0)
145 }
146}
147impl W {
148 #[doc = "Bit 20 - Triggered-half mode"]
149 #[inline(always)]
150 pub fn trghlf(&mut self) -> TRGHLF_W<20> {
151 TRGHLF_W::new(self)
152 }
153 #[doc = "Bit 17 - Greater than Compare 3 PWM mode"]
154 #[inline(always)]
155 pub fn gtcmp3(&mut self) -> GTCMP3_W<17> {
156 GTCMP3_W::new(self)
157 }
158 #[doc = "Bit 16 - Greater than Compare 1 PWM mode"]
159 #[inline(always)]
160 pub fn gtcmp1(&mut self) -> GTCMP1_W<16> {
161 GTCMP1_W::new(self)
162 }
163 #[doc = "Bits 14:15 - Fault and Event Roll-Over Mode"]
164 #[inline(always)]
165 pub fn ferom(&mut self) -> FEROM_W<14> {
166 FEROM_W::new(self)
167 }
168 #[doc = "Bits 12:13 - Burst Mode Roll-Over Mode"]
169 #[inline(always)]
170 pub fn bmrom(&mut self) -> BMROM_W<12> {
171 BMROM_W::new(self)
172 }
173 #[doc = "Bits 10:11 - ADC Roll-Over Mode"]
174 #[inline(always)]
175 pub fn adrom(&mut self) -> ADROM_W<10> {
176 ADROM_W::new(self)
177 }
178 #[doc = "Bits 8:9 - Output Roll-Over Mode"]
179 #[inline(always)]
180 pub fn outrom(&mut self) -> OUTROM_W<8> {
181 OUTROM_W::new(self)
182 }
183 #[doc = "Bits 6:7 - Roll-Over Mode"]
184 #[inline(always)]
185 pub fn rom(&mut self) -> ROM_W<6> {
186 ROM_W::new(self)
187 }
188 #[doc = "Bit 4 - Up-Down Mode"]
189 #[inline(always)]
190 pub fn udm(&mut self) -> UDM_W<4> {
191 UDM_W::new(self)
192 }
193 #[doc = "Bit 2 - Dual Channel DAC Reset trigger"]
194 #[inline(always)]
195 pub fn dcdr(&mut self) -> DCDR_W<2> {
196 DCDR_W::new(self)
197 }
198 #[doc = "Bit 1 - Dual Channel DAC Step trigger"]
199 #[inline(always)]
200 pub fn dcds(&mut self) -> DCDS_W<1> {
201 DCDS_W::new(self)
202 }
203 #[doc = "Bit 0 - Dual Channel DAC trigger enable"]
204 #[inline(always)]
205 pub fn dcde(&mut self) -> DCDE_W<0> {
206 DCDE_W::new(self)
207 }
208 #[doc = "Writes raw bits to the register."]
209 #[inline(always)]
210 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
211 self.0.bits(bits);
212 self
213 }
214}
215#[doc = "HRTIM Timerx Control Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timacr2](index.html) module"]
216pub struct TIMACR2_SPEC;
217impl crate::RegisterSpec for TIMACR2_SPEC {
218 type Ux = u32;
219}
220#[doc = "`read()` method returns [timacr2::R](R) reader structure"]
221impl crate::Readable for TIMACR2_SPEC {
222 type Reader = R;
223}
224#[doc = "`write(|w| ..)` method takes [timacr2::W](W) writer structure"]
225impl crate::Writable for TIMACR2_SPEC {
226 type Writer = W;
227}
228#[doc = "`reset()` method sets TIMACR2 to value 0"]
229impl crate::Resettable for TIMACR2_SPEC {
230 #[inline(always)]
231 fn reset_value() -> Self::Ux {
232 0
233 }
234}