Type Definition stm32g4::stm32g484::hrtim_tima::timacr::W[][src]

type W = W<u32, TIMACR>;

Writer for register TIMACR

Implementations

impl W[src]

pub fn updgat(&mut self) -> UPDGAT_W<'_>[src]

Bits 28:31 - Update Gating

pub fn preen(&mut self) -> PREEN_W<'_>[src]

Bit 27 - Preload enable

pub fn dacsync(&mut self) -> DACSYNC_W<'_>[src]

Bits 25:26 - AC Synchronization

pub fn mstu(&mut self) -> MSTU_W<'_>[src]

Bit 24 - Master Timer update

pub fn teu(&mut self) -> TEU_W<'_>[src]

Bit 23 - TEU

pub fn tdu(&mut self) -> TDU_W<'_>[src]

Bit 22 - TDU

pub fn tcu(&mut self) -> TCU_W<'_>[src]

Bit 21 - TCU

pub fn tbu(&mut self) -> TBU_W<'_>[src]

Bit 20 - TBU

pub fn tx_rstu(&mut self) -> TXRSTU_W<'_>[src]

Bit 18 - Timerx reset update

pub fn tx_repu(&mut self) -> TXREPU_W<'_>[src]

Bit 17 - Timer x Repetition update

pub fn tfu(&mut self) -> TFU_W<'_>[src]

Bit 16 - TFU

pub fn delcmp4(&mut self) -> DELCMP4_W<'_>[src]

Bits 14:15 - Delayed CMP4 mode

pub fn delcmp2(&mut self) -> DELCMP2_W<'_>[src]

Bits 12:13 - Delayed CMP2 mode

pub fn syncstrtx(&mut self) -> SYNCSTRTX_W<'_>[src]

Bit 11 - Synchronization Starts Timer x

pub fn syncrstx(&mut self) -> SYNCRSTX_W<'_>[src]

Bit 10 - Synchronization Resets Timer x

pub fn rsyncu(&mut self) -> RSYNCU_W<'_>[src]

Bit 9 - Re-Synchronized Update

pub fn intlvd(&mut self) -> INTLVD_W<'_>[src]

Bits 7:8 - Interleaved mode

pub fn pshpll(&mut self) -> PSHPLL_W<'_>[src]

Bit 6 - Push-Pull mode enable

pub fn half(&mut self) -> HALF_W<'_>[src]

Bit 5 - Half mode enable

pub fn retrig(&mut self) -> RETRIG_W<'_>[src]

Bit 4 - Re-triggerable mode

pub fn cont(&mut self) -> CONT_W<'_>[src]

Bit 3 - Continuous mode

pub fn ck_pscx(&mut self) -> CK_PSCX_W<'_>[src]

Bits 0:2 - HRTIM Timer x Clock prescaler