Type Definition stm32g4::stm32g484::fdcan::RWD[][src]

type RWD = Reg<u32, _RWD>;

The RAM Watchdog monitors the READY output of the Message RAM. A Message RAM access starts the Message RAM Watchdog Counter with the value configured by the RWD[WDC] bits. The counter is reloaded with RWD[WDC] bits when the Message RAM signals successful completion by activating its READY output. In case there is no response from the Message RAM until the counter has counted down to 0, the counter stops and interrupt flag IR[WDI] bit is set. The RAM Watchdog Counter is clocked by the fdcan_pclk clock.

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see rwd module

Trait Implementations

impl Readable for RWD[src]

read() method returns rwd::R reader structure

impl ResetValue for RWD[src]

Register RWD reset()'s with value 0

type Type = u32

Register size

impl Writable for RWD[src]

write(|w| ..) method takes rwd::W writer structure