Type Definition stm32g4::stm32g441::adc1::cfgr::R

type R = R<u32, CFGR>;

Reader of register CFGR

Implementations

impl R

pub fn jqdis(&self) -> JQDIS_R

Bit 31 - Injected Queue disable

pub fn awd1ch(&self) -> AWD1CH_R

Bits 26:30 - Analog watchdog 1 channel selection

pub fn jauto(&self) -> JAUTO_R

Bit 25 - Automatic injected group conversion

pub fn jawd1en(&self) -> JAWD1EN_R

Bit 24 - Analog watchdog 1 enable on injected channels

pub fn awd1en(&self) -> AWD1EN_R

Bit 23 - Analog watchdog 1 enable on regular channels

pub fn awd1sgl(&self) -> AWD1SGL_R

Bit 22 - Enable the watchdog 1 on a single channel or on all channels

pub fn jqm(&self) -> JQM_R

Bit 21 - JSQR queue mode

pub fn jdiscen(&self) -> JDISCEN_R

Bit 20 - Discontinuous mode on injected channels

pub fn discnum(&self) -> DISCNUM_R

Bits 17:19 - Discontinuous mode channel count

pub fn discen(&self) -> DISCEN_R

Bit 16 - Discontinuous mode for regular channels

pub fn align(&self) -> ALIGN_R

Bit 15 - Data alignment

pub fn autdly(&self) -> AUTDLY_R

Bit 14 - Delayed conversion mode

pub fn cont(&self) -> CONT_R

Bit 13 - Single / continuous conversion mode for regular conversions

pub fn ovrmod(&self) -> OVRMOD_R

Bit 12 - Overrun mode

pub fn exten(&self) -> EXTEN_R

Bits 10:11 - External trigger enable and polarity selection for regular channels

pub fn extsel(&self) -> EXTSEL_R

Bits 5:9 - External trigger selection for regular group

pub fn res(&self) -> RES_R

Bits 3:4 - Data resolution

pub fn dmacfg(&self) -> DMACFG_R

Bit 1 - Direct memory access configuration

pub fn dmaen(&self) -> DMAEN_R

Bit 0 - Direct memory access enable