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#[doc = "Reader of register CR2"] pub type R = crate::R<u32, super::CR2>; #[doc = "Writer for register CR2"] pub type W = crate::W<u32, super::CR2>; #[doc = "Register CR2 `reset()`'s with value 0x0700"] impl crate::ResetValue for super::CR2 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0x0700 } } #[doc = "Reader of field `RXDMAEN`"] pub type RXDMAEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `RXDMAEN`"] pub struct RXDMAEN_W<'a> { w: &'a mut W, } impl<'a> RXDMAEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `TXDMAEN`"] pub type TXDMAEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TXDMAEN`"] pub struct TXDMAEN_W<'a> { w: &'a mut W, } impl<'a> TXDMAEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `SSOE`"] pub type SSOE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SSOE`"] pub struct SSOE_W<'a> { w: &'a mut W, } impl<'a> SSOE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `NSSP`"] pub type NSSP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `NSSP`"] pub struct NSSP_W<'a> { w: &'a mut W, } impl<'a> NSSP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `FRF`"] pub type FRF_R = crate::R<bool, bool>; #[doc = "Write proxy for field `FRF`"] pub struct FRF_W<'a> { w: &'a mut W, } impl<'a> FRF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `ERRIE`"] pub type ERRIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ERRIE`"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `RXNEIE`"] pub type RXNEIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `RXNEIE`"] pub struct RXNEIE_W<'a> { w: &'a mut W, } impl<'a> RXNEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); self.w } } #[doc = "Reader of field `TXEIE`"] pub type TXEIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TXEIE`"] pub struct TXEIE_W<'a> { w: &'a mut W, } impl<'a> TXEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); self.w } } #[doc = "Reader of field `DS`"] pub type DS_R = crate::R<u8, u8>; #[doc = "Write proxy for field `DS`"] pub struct DS_W<'a> { w: &'a mut W, } impl<'a> DS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8); self.w } } #[doc = "Reader of field `FRXTH`"] pub type FRXTH_R = crate::R<bool, bool>; #[doc = "Write proxy for field `FRXTH`"] pub struct FRXTH_W<'a> { w: &'a mut W, } impl<'a> FRXTH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = "Reader of field `LDMA_RX`"] pub type LDMA_RX_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LDMA_RX`"] pub struct LDMA_RX_W<'a> { w: &'a mut W, } impl<'a> LDMA_RX_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); self.w } } #[doc = "Reader of field `LDMA_TX`"] pub type LDMA_TX_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LDMA_TX`"] pub struct LDMA_TX_W<'a> { w: &'a mut W, } impl<'a> LDMA_TX_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } impl R { #[doc = "Bit 0 - Rx buffer DMA enable"] #[inline(always)] pub fn rxdmaen(&self) -> RXDMAEN_R { RXDMAEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Tx buffer DMA enable"] #[inline(always)] pub fn txdmaen(&self) -> TXDMAEN_R { TXDMAEN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - SS output enable"] #[inline(always)] pub fn ssoe(&self) -> SSOE_R { SSOE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - NSS pulse management"] #[inline(always)] pub fn nssp(&self) -> NSSP_R { NSSP_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Frame format"] #[inline(always)] pub fn frf(&self) -> FRF_R { FRF_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - RX buffer not empty interrupt enable"] #[inline(always)] pub fn rxneie(&self) -> RXNEIE_R { RXNEIE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Tx buffer empty interrupt enable"] #[inline(always)] pub fn txeie(&self) -> TXEIE_R { TXEIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 8:11 - Data size"] #[inline(always)] pub fn ds(&self) -> DS_R { DS_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 12 - FIFO reception threshold"] #[inline(always)] pub fn frxth(&self) -> FRXTH_R { FRXTH_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Last DMA transfer for reception"] #[inline(always)] pub fn ldma_rx(&self) -> LDMA_RX_R { LDMA_RX_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Last DMA transfer for transmission"] #[inline(always)] pub fn ldma_tx(&self) -> LDMA_TX_R { LDMA_TX_R::new(((self.bits >> 14) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Rx buffer DMA enable"] #[inline(always)] pub fn rxdmaen(&mut self) -> RXDMAEN_W { RXDMAEN_W { w: self } } #[doc = "Bit 1 - Tx buffer DMA enable"] #[inline(always)] pub fn txdmaen(&mut self) -> TXDMAEN_W { TXDMAEN_W { w: self } } #[doc = "Bit 2 - SS output enable"] #[inline(always)] pub fn ssoe(&mut self) -> SSOE_W { SSOE_W { w: self } } #[doc = "Bit 3 - NSS pulse management"] #[inline(always)] pub fn nssp(&mut self) -> NSSP_W { NSSP_W { w: self } } #[doc = "Bit 4 - Frame format"] #[inline(always)] pub fn frf(&mut self) -> FRF_W { FRF_W { w: self } } #[doc = "Bit 5 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 6 - RX buffer not empty interrupt enable"] #[inline(always)] pub fn rxneie(&mut self) -> RXNEIE_W { RXNEIE_W { w: self } } #[doc = "Bit 7 - Tx buffer empty interrupt enable"] #[inline(always)] pub fn txeie(&mut self) -> TXEIE_W { TXEIE_W { w: self } } #[doc = "Bits 8:11 - Data size"] #[inline(always)] pub fn ds(&mut self) -> DS_W { DS_W { w: self } } #[doc = "Bit 12 - FIFO reception threshold"] #[inline(always)] pub fn frxth(&mut self) -> FRXTH_W { FRXTH_W { w: self } } #[doc = "Bit 13 - Last DMA transfer for reception"] #[inline(always)] pub fn ldma_rx(&mut self) -> LDMA_RX_W { LDMA_RX_W { w: self } } #[doc = "Bit 14 - Last DMA transfer for transmission"] #[inline(always)] pub fn ldma_tx(&mut self) -> LDMA_TX_W { LDMA_TX_W { w: self } } }