1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594
#[doc = "Reader of register AHB2SMENR"] pub type R = crate::R<u32, super::AHB2SMENR>; #[doc = "Writer for register AHB2SMENR"] pub type W = crate::W<u32, super::AHB2SMENR>; #[doc = "Register AHB2SMENR `reset()`'s with value 0x050f_667f"] impl crate::ResetValue for super::AHB2SMENR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0x050f_667f } } #[doc = "Reader of field `GPIOASMEN`"] pub type GPIOASMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOASMEN`"] pub struct GPIOASMEN_W<'a> { w: &'a mut W, } impl<'a> GPIOASMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `GPIOBSMEN`"] pub type GPIOBSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOBSMEN`"] pub struct GPIOBSMEN_W<'a> { w: &'a mut W, } impl<'a> GPIOBSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `GPIOCSMEN`"] pub type GPIOCSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOCSMEN`"] pub struct GPIOCSMEN_W<'a> { w: &'a mut W, } impl<'a> GPIOCSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `GPIODSMEN`"] pub type GPIODSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIODSMEN`"] pub struct GPIODSMEN_W<'a> { w: &'a mut W, } impl<'a> GPIODSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `GPIOESMEN`"] pub type GPIOESMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOESMEN`"] pub struct GPIOESMEN_W<'a> { w: &'a mut W, } impl<'a> GPIOESMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `GPIOFSMEN`"] pub type GPIOFSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOFSMEN`"] pub struct GPIOFSMEN_W<'a> { w: &'a mut W, } impl<'a> GPIOFSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `GPIOGSMEN`"] pub type GPIOGSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOGSMEN`"] pub struct GPIOGSMEN_W<'a> { w: &'a mut W, } impl<'a> GPIOGSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); self.w } } #[doc = "Reader of field `ADC12SMEN`"] pub type ADC12SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ADC12SMEN`"] pub struct ADC12SMEN_W<'a> { w: &'a mut W, } impl<'a> ADC12SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); self.w } } #[doc = "Reader of field `ADC345SMEN`"] pub type ADC345SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ADC345SMEN`"] pub struct ADC345SMEN_W<'a> { w: &'a mut W, } impl<'a> ADC345SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "Reader of field `DAC1SMEN`"] pub type DAC1SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DAC1SMEN`"] pub struct DAC1SMEN_W<'a> { w: &'a mut W, } impl<'a> DAC1SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "Reader of field `DAC2SMEN`"] pub type DAC2SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DAC2SMEN`"] pub struct DAC2SMEN_W<'a> { w: &'a mut W, } impl<'a> DAC2SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `DAC3SMEN`"] pub type DAC3SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DAC3SMEN`"] pub struct DAC3SMEN_W<'a> { w: &'a mut W, } impl<'a> DAC3SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Reader of field `DAC4SMEN`"] pub type DAC4SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DAC4SMEN`"] pub struct DAC4SMEN_W<'a> { w: &'a mut W, } impl<'a> DAC4SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); self.w } } #[doc = "Reader of field `AESMEN`"] pub type AESMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `AESMEN`"] pub struct AESMEN_W<'a> { w: &'a mut W, } impl<'a> AESMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); self.w } } #[doc = "Reader of field `RNGEN`"] pub type RNGEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `RNGEN`"] pub struct RNGEN_W<'a> { w: &'a mut W, } impl<'a> RNGEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); self.w } } #[doc = "Reader of field `CCMSRAMSMEN`"] pub type CCMSRAMSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CCMSRAMSMEN`"] pub struct CCMSRAMSMEN_W<'a> { w: &'a mut W, } impl<'a> CCMSRAMSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Reader of field `SRAM2SMEN`"] pub type SRAM2SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SRAM2SMEN`"] pub struct SRAM2SMEN_W<'a> { w: &'a mut W, } impl<'a> SRAM2SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - IO port A clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpioasmen(&self) -> GPIOASMEN_R { GPIOASMEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - IO port B clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpiobsmen(&self) -> GPIOBSMEN_R { GPIOBSMEN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - IO port C clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpiocsmen(&self) -> GPIOCSMEN_R { GPIOCSMEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - IO port D clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpiodsmen(&self) -> GPIODSMEN_R { GPIODSMEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - IO port E clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpioesmen(&self) -> GPIOESMEN_R { GPIOESMEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - IO port F clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpiofsmen(&self) -> GPIOFSMEN_R { GPIOFSMEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - IO port G clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpiogsmen(&self) -> GPIOGSMEN_R { GPIOGSMEN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 13 - ADC clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn adc12smen(&self) -> ADC12SMEN_R { ADC12SMEN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - DCMI clock enable during Sleep and Stop modes"] #[inline(always)] pub fn adc345smen(&self) -> ADC345SMEN_R { ADC345SMEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 16 - AES accelerator clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn dac1smen(&self) -> DAC1SMEN_R { DAC1SMEN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - HASH clock enable during Sleep and Stop modes"] #[inline(always)] pub fn dac2smen(&self) -> DAC2SMEN_R { DAC2SMEN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - DAC3 clock enable during sleep mode"] #[inline(always)] pub fn dac3smen(&self) -> DAC3SMEN_R { DAC3SMEN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - DAC4 clock enable during sleep mode"] #[inline(always)] pub fn dac4smen(&self) -> DAC4SMEN_R { DAC4SMEN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 24 - Cryptography clock enable during sleep mode"] #[inline(always)] pub fn aesmen(&self) -> AESMEN_R { AESMEN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 26 - Random Number Generator clock enable during sleep mode"] #[inline(always)] pub fn rngen(&self) -> RNGEN_R { RNGEN_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 9 - CCM SRAM interface clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn ccmsramsmen(&self) -> CCMSRAMSMEN_R { CCMSRAMSMEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - SRAM2 interface clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn sram2smen(&self) -> SRAM2SMEN_R { SRAM2SMEN_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - IO port A clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpioasmen(&mut self) -> GPIOASMEN_W { GPIOASMEN_W { w: self } } #[doc = "Bit 1 - IO port B clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpiobsmen(&mut self) -> GPIOBSMEN_W { GPIOBSMEN_W { w: self } } #[doc = "Bit 2 - IO port C clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpiocsmen(&mut self) -> GPIOCSMEN_W { GPIOCSMEN_W { w: self } } #[doc = "Bit 3 - IO port D clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpiodsmen(&mut self) -> GPIODSMEN_W { GPIODSMEN_W { w: self } } #[doc = "Bit 4 - IO port E clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpioesmen(&mut self) -> GPIOESMEN_W { GPIOESMEN_W { w: self } } #[doc = "Bit 5 - IO port F clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpiofsmen(&mut self) -> GPIOFSMEN_W { GPIOFSMEN_W { w: self } } #[doc = "Bit 6 - IO port G clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn gpiogsmen(&mut self) -> GPIOGSMEN_W { GPIOGSMEN_W { w: self } } #[doc = "Bit 13 - ADC clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn adc12smen(&mut self) -> ADC12SMEN_W { ADC12SMEN_W { w: self } } #[doc = "Bit 14 - DCMI clock enable during Sleep and Stop modes"] #[inline(always)] pub fn adc345smen(&mut self) -> ADC345SMEN_W { ADC345SMEN_W { w: self } } #[doc = "Bit 16 - AES accelerator clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn dac1smen(&mut self) -> DAC1SMEN_W { DAC1SMEN_W { w: self } } #[doc = "Bit 17 - HASH clock enable during Sleep and Stop modes"] #[inline(always)] pub fn dac2smen(&mut self) -> DAC2SMEN_W { DAC2SMEN_W { w: self } } #[doc = "Bit 18 - DAC3 clock enable during sleep mode"] #[inline(always)] pub fn dac3smen(&mut self) -> DAC3SMEN_W { DAC3SMEN_W { w: self } } #[doc = "Bit 19 - DAC4 clock enable during sleep mode"] #[inline(always)] pub fn dac4smen(&mut self) -> DAC4SMEN_W { DAC4SMEN_W { w: self } } #[doc = "Bit 24 - Cryptography clock enable during sleep mode"] #[inline(always)] pub fn aesmen(&mut self) -> AESMEN_W { AESMEN_W { w: self } } #[doc = "Bit 26 - Random Number Generator clock enable during sleep mode"] #[inline(always)] pub fn rngen(&mut self) -> RNGEN_W { RNGEN_W { w: self } } #[doc = "Bit 9 - CCM SRAM interface clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn ccmsramsmen(&mut self) -> CCMSRAMSMEN_W { CCMSRAMSMEN_W { w: self } } #[doc = "Bit 10 - SRAM2 interface clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn sram2smen(&mut self) -> SRAM2SMEN_W { SRAM2SMEN_W { w: self } } }