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#[doc = "Reader of register C13CR"] pub type R = crate::R<u32, super::C13CR>; #[doc = "Writer for register C13CR"] pub type W = crate::W<u32, super::C13CR>; #[doc = "Register C13CR `reset()`'s with value 0"] impl crate::ResetValue for super::C13CR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `DMAREQ_ID`"] pub type DMAREQ_ID_R = crate::R<u8, u8>; #[doc = "Write proxy for field `DMAREQ_ID`"] pub struct DMAREQ_ID_W<'a> { w: &'a mut W, } impl<'a> DMAREQ_ID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x7f) | ((value as u32) & 0x7f); self.w } } #[doc = "Reader of field `SOIE`"] pub type SOIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SOIE`"] pub struct SOIE_W<'a> { w: &'a mut W, } impl<'a> SOIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `EGE`"] pub type EGE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `EGE`"] pub struct EGE_W<'a> { w: &'a mut W, } impl<'a> EGE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Reader of field `SE`"] pub type SE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SE`"] pub struct SE_W<'a> { w: &'a mut W, } impl<'a> SE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "Reader of field `SPOL`"] pub type SPOL_R = crate::R<u8, u8>; #[doc = "Write proxy for field `SPOL`"] pub struct SPOL_W<'a> { w: &'a mut W, } impl<'a> SPOL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 17)) | (((value as u32) & 0x03) << 17); self.w } } #[doc = "Reader of field `NBREQ`"] pub type NBREQ_R = crate::R<u8, u8>; #[doc = "Write proxy for field `NBREQ`"] pub struct NBREQ_W<'a> { w: &'a mut W, } impl<'a> NBREQ_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 19)) | (((value as u32) & 0x1f) << 19); self.w } } #[doc = "Reader of field `SYNC_ID`"] pub type SYNC_ID_R = crate::R<u8, u8>; #[doc = "Write proxy for field `SYNC_ID`"] pub struct SYNC_ID_W<'a> { w: &'a mut W, } impl<'a> SYNC_ID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 24)) | (((value as u32) & 0x1f) << 24); self.w } } impl R { #[doc = "Bits 0:6 - Input DMA request line selected"] #[inline(always)] pub fn dmareq_id(&self) -> DMAREQ_ID_R { DMAREQ_ID_R::new((self.bits & 0x7f) as u8) } #[doc = "Bit 8 - Interrupt enable at synchronization event overrun"] #[inline(always)] pub fn soie(&self) -> SOIE_R { SOIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Event generation enable/disable"] #[inline(always)] pub fn ege(&self) -> EGE_R { EGE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 16 - Synchronous operating mode enable/disable"] #[inline(always)] pub fn se(&self) -> SE_R { SE_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bits 17:18 - Synchronization event type selector Defines the synchronization event on the selected synchronization input:"] #[inline(always)] pub fn spol(&self) -> SPOL_R { SPOL_R::new(((self.bits >> 17) & 0x03) as u8) } #[doc = "Bits 19:23 - Number of DMA requests to forward Defines the number of DMA requests forwarded before output event is generated. In synchronous mode, it also defines the number of DMA requests to forward after a synchronization event, then stop forwarding. The actual number of DMA requests forwarded is NBREQ+1. Note: This field can only be written when both SE and EGE bits are reset."] #[inline(always)] pub fn nbreq(&self) -> NBREQ_R { NBREQ_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 24:28 - Synchronization input selected"] #[inline(always)] pub fn sync_id(&self) -> SYNC_ID_R { SYNC_ID_R::new(((self.bits >> 24) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:6 - Input DMA request line selected"] #[inline(always)] pub fn dmareq_id(&mut self) -> DMAREQ_ID_W { DMAREQ_ID_W { w: self } } #[doc = "Bit 8 - Interrupt enable at synchronization event overrun"] #[inline(always)] pub fn soie(&mut self) -> SOIE_W { SOIE_W { w: self } } #[doc = "Bit 9 - Event generation enable/disable"] #[inline(always)] pub fn ege(&mut self) -> EGE_W { EGE_W { w: self } } #[doc = "Bit 16 - Synchronous operating mode enable/disable"] #[inline(always)] pub fn se(&mut self) -> SE_W { SE_W { w: self } } #[doc = "Bits 17:18 - Synchronization event type selector Defines the synchronization event on the selected synchronization input:"] #[inline(always)] pub fn spol(&mut self) -> SPOL_W { SPOL_W { w: self } } #[doc = "Bits 19:23 - Number of DMA requests to forward Defines the number of DMA requests forwarded before output event is generated. In synchronous mode, it also defines the number of DMA requests to forward after a synchronization event, then stop forwarding. The actual number of DMA requests forwarded is NBREQ+1. Note: This field can only be written when both SE and EGE bits are reset."] #[inline(always)] pub fn nbreq(&mut self) -> NBREQ_W { NBREQ_W { w: self } } #[doc = "Bits 24:28 - Synchronization input selected"] #[inline(always)] pub fn sync_id(&mut self) -> SYNC_ID_W { SYNC_ID_W { w: self } } }