stm32g4_staging/stm32g484/flash/
eccr.rs

1///Register `ECCR` reader
2pub type R = crate::R<ECCRrs>;
3///Register `ECCR` writer
4pub type W = crate::W<ECCRrs>;
5///Field `ADDR_ECC` reader - ECC fail address
6pub type ADDR_ECC_R = crate::FieldReader<u32>;
7///Field `BK_ECC` reader - BK_ECC
8pub type BK_ECC_R = crate::BitReader;
9///Field `SYSF_ECC` reader - SYSF_ECC
10pub type SYSF_ECC_R = crate::BitReader;
11///Field `ECCIE` reader - ECCIE
12pub type ECCIE_R = crate::BitReader;
13///Field `ECCIE` writer - ECCIE
14pub type ECCIE_W<'a, REG> = crate::BitWriter<'a, REG>;
15///Field `ECCC2` reader - ECC correction
16pub type ECCC2_R = crate::BitReader;
17///Field `ECCC2` writer - ECC correction
18pub type ECCC2_W<'a, REG> = crate::BitWriter<'a, REG>;
19///Field `ECCD2` reader - ECC2 detection
20pub type ECCD2_R = crate::BitReader;
21///Field `ECCD2` writer - ECC2 detection
22pub type ECCD2_W<'a, REG> = crate::BitWriter<'a, REG>;
23///Field `ECCC` reader - ECC correction
24pub type ECCC_R = crate::BitReader;
25///Field `ECCC` writer - ECC correction
26pub type ECCC_W<'a, REG> = crate::BitWriter<'a, REG>;
27///Field `ECCD` reader - ECC detection
28pub type ECCD_R = crate::BitReader;
29///Field `ECCD` writer - ECC detection
30pub type ECCD_W<'a, REG> = crate::BitWriter<'a, REG>;
31impl R {
32    ///Bits 0:18 - ECC fail address
33    #[inline(always)]
34    pub fn addr_ecc(&self) -> ADDR_ECC_R {
35        ADDR_ECC_R::new(self.bits & 0x0007_ffff)
36    }
37    ///Bit 21 - BK_ECC
38    #[inline(always)]
39    pub fn bk_ecc(&self) -> BK_ECC_R {
40        BK_ECC_R::new(((self.bits >> 21) & 1) != 0)
41    }
42    ///Bit 22 - SYSF_ECC
43    #[inline(always)]
44    pub fn sysf_ecc(&self) -> SYSF_ECC_R {
45        SYSF_ECC_R::new(((self.bits >> 22) & 1) != 0)
46    }
47    ///Bit 24 - ECCIE
48    #[inline(always)]
49    pub fn eccie(&self) -> ECCIE_R {
50        ECCIE_R::new(((self.bits >> 24) & 1) != 0)
51    }
52    ///Bit 28 - ECC correction
53    #[inline(always)]
54    pub fn eccc2(&self) -> ECCC2_R {
55        ECCC2_R::new(((self.bits >> 28) & 1) != 0)
56    }
57    ///Bit 29 - ECC2 detection
58    #[inline(always)]
59    pub fn eccd2(&self) -> ECCD2_R {
60        ECCD2_R::new(((self.bits >> 29) & 1) != 0)
61    }
62    ///Bit 30 - ECC correction
63    #[inline(always)]
64    pub fn eccc(&self) -> ECCC_R {
65        ECCC_R::new(((self.bits >> 30) & 1) != 0)
66    }
67    ///Bit 31 - ECC detection
68    #[inline(always)]
69    pub fn eccd(&self) -> ECCD_R {
70        ECCD_R::new(((self.bits >> 31) & 1) != 0)
71    }
72}
73impl core::fmt::Debug for R {
74    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
75        f.debug_struct("ECCR")
76            .field("addr_ecc", &self.addr_ecc())
77            .field("bk_ecc", &self.bk_ecc())
78            .field("sysf_ecc", &self.sysf_ecc())
79            .field("eccie", &self.eccie())
80            .field("eccc2", &self.eccc2())
81            .field("eccd2", &self.eccd2())
82            .field("eccc", &self.eccc())
83            .field("eccd", &self.eccd())
84            .finish()
85    }
86}
87impl W {
88    ///Bit 24 - ECCIE
89    #[inline(always)]
90    pub fn eccie(&mut self) -> ECCIE_W<ECCRrs> {
91        ECCIE_W::new(self, 24)
92    }
93    ///Bit 28 - ECC correction
94    #[inline(always)]
95    pub fn eccc2(&mut self) -> ECCC2_W<ECCRrs> {
96        ECCC2_W::new(self, 28)
97    }
98    ///Bit 29 - ECC2 detection
99    #[inline(always)]
100    pub fn eccd2(&mut self) -> ECCD2_W<ECCRrs> {
101        ECCD2_W::new(self, 29)
102    }
103    ///Bit 30 - ECC correction
104    #[inline(always)]
105    pub fn eccc(&mut self) -> ECCC_W<ECCRrs> {
106        ECCC_W::new(self, 30)
107    }
108    ///Bit 31 - ECC detection
109    #[inline(always)]
110    pub fn eccd(&mut self) -> ECCD_W<ECCRrs> {
111        ECCD_W::new(self, 31)
112    }
113}
114/**Flash ECC register
115
116You can [`read`](crate::Reg::read) this register and get [`eccr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eccr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
117
118See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G484.html#FLASH:ECCR)*/
119pub struct ECCRrs;
120impl crate::RegisterSpec for ECCRrs {
121    type Ux = u32;
122}
123///`read()` method returns [`eccr::R`](R) reader structure
124impl crate::Readable for ECCRrs {}
125///`write(|w| ..)` method takes [`eccr::W`](W) writer structure
126impl crate::Writable for ECCRrs {
127    type Safety = crate::Unsafe;
128}
129///`reset()` method sets ECCR to value 0
130impl crate::Resettable for ECCRrs {}
stm32g4_staging/stm32g484/flash/eccr.rs

stm32g4_staging/stm32g484/flash/
eccr.rs
