stm32g4_staging/stm32g484/flash/
wrp1br.rs

1///Register `WRP1BR` reader
2pub type R = crate::R<WRP1BRrs>;
3///Register `WRP1BR` writer
4pub type W = crate::W<WRP1BRrs>;
5///Field `WRP1B_STRT` reader - Bank 1 WRP second area B end offset
6pub type WRP1B_STRT_R = crate::FieldReader;
7///Field `WRP1B_STRT` writer - Bank 1 WRP second area B end offset
8pub type WRP1B_STRT_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
9///Field `WRP1B_END` reader - Bank 1 WRP second area B start offset
10pub type WRP1B_END_R = crate::FieldReader;
11///Field `WRP1B_END` writer - Bank 1 WRP second area B start offset
12pub type WRP1B_END_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
13impl R {
14    ///Bits 0:6 - Bank 1 WRP second area B end offset
15    #[inline(always)]
16    pub fn wrp1b_strt(&self) -> WRP1B_STRT_R {
17        WRP1B_STRT_R::new((self.bits & 0x7f) as u8)
18    }
19    ///Bits 16:22 - Bank 1 WRP second area B start offset
20    #[inline(always)]
21    pub fn wrp1b_end(&self) -> WRP1B_END_R {
22        WRP1B_END_R::new(((self.bits >> 16) & 0x7f) as u8)
23    }
24}
25impl core::fmt::Debug for R {
26    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
27        f.debug_struct("WRP1BR")
28            .field("wrp1b_strt", &self.wrp1b_strt())
29            .field("wrp1b_end", &self.wrp1b_end())
30            .finish()
31    }
32}
33impl W {
34    ///Bits 0:6 - Bank 1 WRP second area B end offset
35    #[inline(always)]
36    pub fn wrp1b_strt(&mut self) -> WRP1B_STRT_W<WRP1BRrs> {
37        WRP1B_STRT_W::new(self, 0)
38    }
39    ///Bits 16:22 - Bank 1 WRP second area B start offset
40    #[inline(always)]
41    pub fn wrp1b_end(&mut self) -> WRP1B_END_W<WRP1BRrs> {
42        WRP1B_END_W::new(self, 16)
43    }
44}
45/**Flash Bank 1 WRP area B address register
46
47You can [`read`](crate::Reg::read) this register and get [`wrp1br::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wrp1br::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
48
49See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G484.html#FLASH:WRP1BR)*/
50pub struct WRP1BRrs;
51impl crate::RegisterSpec for WRP1BRrs {
52    type Ux = u32;
53}
54///`read()` method returns [`wrp1br::R`](R) reader structure
55impl crate::Readable for WRP1BRrs {}
56///`write(|w| ..)` method takes [`wrp1br::W`](W) writer structure
57impl crate::Writable for WRP1BRrs {
58    type Safety = crate::Unsafe;
59}
60///`reset()` method sets WRP1BR to value 0
61impl crate::Resettable for WRP1BRrs {}
stm32g4_staging/stm32g484/flash/wrp1br.rs

stm32g4_staging/stm32g484/flash/
wrp1br.rs
