stm32g0xx_hal/rcc/
config.rs

1use crate::time::Hertz;
2
3/// Prescaler
4#[derive(Clone, Copy)]
5pub enum Prescaler {
6    NotDivided,
7    Div2,
8    Div4,
9    Div8,
10    Div16,
11    Div32,
12    Div64,
13    Div128,
14    Div256,
15    Div512,
16}
17
18/// System clock mux source
19pub enum SysClockSrc {
20    LSI,
21    PLL,
22    HSI(Prescaler),
23    HSE(Hertz),
24    HSE_BYPASS(Hertz),
25    LSE(Hertz),
26    LSE_BYPASS(Hertz),
27}
28
29/// Microcontroller clock output source
30pub enum MCOSrc {
31    LSI,
32    PLL,
33    SysClk,
34    HSI,
35    HSE,
36    LSE,
37}
38
39/// Low-speed clocks output source
40pub enum LSCOSrc {
41    LSI,
42    LSE,
43}
44
45/// PLL clock input source
46#[derive(Clone, Copy)]
47pub enum PLLSrc {
48    HSI,
49    HSE(Hertz),
50    HSE_BYPASS(Hertz),
51}
52
53/// RTC clock input source
54#[derive(Clone, Copy)]
55pub enum RTCSrc {
56    LSE,
57    LSE_BYPASS,
58    LSI,
59    HSE,
60    HSE_BYPASS,
61}
62
63/// PLL divider
64pub type PLLDiv = u8;
65
66/// PLL multiplier
67pub type PLLMul = u8;
68
69/// PLL config
70#[derive(Clone, Copy)]
71pub struct PllConfig {
72    pub mux: PLLSrc,
73    pub m: PLLDiv,
74    pub n: PLLMul,
75    pub r: PLLDiv,
76    pub q: Option<PLLDiv>,
77    pub p: Option<PLLDiv>,
78}
79
80impl Default for PllConfig {
81    fn default() -> PllConfig {
82        PllConfig {
83            mux: PLLSrc::HSI,
84            m: 1,
85            n: 8,
86            r: 2,
87            q: None,
88            p: None,
89        }
90    }
91}
92
93impl PllConfig {
94    pub fn with_hsi(m: PLLDiv, n: PLLMul, r: PLLDiv) -> PllConfig {
95        PllConfig {
96            mux: PLLSrc::HSI,
97            m,
98            n,
99            r,
100            q: None,
101            p: None,
102        }
103    }
104}
105
106/// Clocks configutation
107pub struct Config {
108    pub(crate) sys_mux: SysClockSrc,
109    pub(crate) pll_cfg: PllConfig,
110    pub(crate) ahb_psc: Prescaler,
111    pub(crate) apb_psc: Prescaler,
112}
113
114impl Config {
115    pub fn new(mux: SysClockSrc) -> Self {
116        Config::default().clock_src(mux)
117    }
118
119    pub fn pll() -> Self {
120        Config::default().clock_src(SysClockSrc::PLL)
121    }
122
123    pub fn hsi(psc: Prescaler) -> Self {
124        Config::default().clock_src(SysClockSrc::HSI(psc))
125    }
126
127    pub fn lsi() -> Self {
128        Config::default().clock_src(SysClockSrc::LSI)
129    }
130
131    pub fn clock_src(mut self, mux: SysClockSrc) -> Self {
132        self.sys_mux = mux;
133        self
134    }
135
136    pub fn pll_cfg(mut self, cfg: PllConfig) -> Self {
137        self.pll_cfg = cfg;
138        self
139    }
140
141    pub fn ahb_psc(mut self, psc: Prescaler) -> Self {
142        self.ahb_psc = psc;
143        self
144    }
145
146    pub fn apb_psc(mut self, psc: Prescaler) -> Self {
147        self.apb_psc = psc;
148        self
149    }
150}
151
152impl Default for Config {
153    fn default() -> Config {
154        Config {
155            sys_mux: SysClockSrc::HSI(Prescaler::NotDivided),
156            pll_cfg: PllConfig::default(),
157            ahb_psc: Prescaler::NotDivided,
158            apb_psc: Prescaler::NotDivided,
159        }
160    }
161}
stm32g0xx_hal/rcc/config.rs

stm32g0xx_hal/rcc/
config.rs
