pub struct R(/* private fields */);
Expand description
Register DAC_SR
reader
Implementations§
Source§impl R
impl R
Sourcepub fn dmaudr1(&self) -> DMAUDR1_R
pub fn dmaudr1(&self) -> DMAUDR1_R
Bit 13 - DAC channel1 DMA underrun flag This bit is set by hardware and cleared by software (by writing it to 1).
Sourcepub fn cal_flag1(&self) -> CAL_FLAG1_R
pub fn cal_flag1(&self) -> CAL_FLAG1_R
Bit 14 - DAC Channel 1 calibration offset status This bit is set and cleared by hardware
Sourcepub fn bwst1(&self) -> BWST1_R
pub fn bwst1(&self) -> BWST1_R
Bit 15 - DAC Channel 1 busy writing sample time flag This bit is systematically set just after Sample & Hold mode enable and is set each time the software writes the register DAC_SHSR1, It is cleared by hardware when the write operation of DAC_SHSR1 is complete. (It takes about 3LSI periods of synchronization).
Sourcepub fn dmaudr2(&self) -> DMAUDR2_R
pub fn dmaudr2(&self) -> DMAUDR2_R
Bit 29 - DAC channel2 DMA underrun flag This bit is set by hardware and cleared by software (by writing it to 1).
Sourcepub fn cal_flag2(&self) -> CAL_FLAG2_R
pub fn cal_flag2(&self) -> CAL_FLAG2_R
Bit 30 - DAC Channel 2 calibration offset status This bit is set and cleared by hardware
Sourcepub fn bwst2(&self) -> BWST2_R
pub fn bwst2(&self) -> BWST2_R
Bit 31 - DAC Channel 2 busy writing sample time flag This bit is systematically set just after Sample & Hold mode enable and is set each time the software writes the register DAC_SHSR2, It is cleared by hardware when the write operation of DAC_SHSR2 is complete. (It takes about 3 LSI periods of synchronization).
Methods from Deref<Target = R<DAC_SR_SPEC>>§
Sourcepub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.