Struct W 

pub struct W(/* private fields */);

Register IMR1 writer

Implementations

impl W

pub fn im0(&mut self) -> IM0_W<'_>

Bit 0 - CPU wakeup with interrupt mask on event input

pub fn im1(&mut self) -> IM1_W<'_>

Bit 1 - CPU wakeup with interrupt mask on event input

pub fn im2(&mut self) -> IM2_W<'_>

Bit 2 - CPU wakeup with interrupt mask on event input

pub fn im3(&mut self) -> IM3_W<'_>

Bit 3 - CPU wakeup with interrupt mask on event input

pub fn im4(&mut self) -> IM4_W<'_>

Bit 4 - CPU wakeup with interrupt mask on event input

pub fn im5(&mut self) -> IM5_W<'_>

Bit 5 - CPU wakeup with interrupt mask on event input

pub fn im6(&mut self) -> IM6_W<'_>

Bit 6 - CPU wakeup with interrupt mask on event input

pub fn im7(&mut self) -> IM7_W<'_>

Bit 7 - CPU wakeup with interrupt mask on event input

pub fn im8(&mut self) -> IM8_W<'_>

Bit 8 - CPU wakeup with interrupt mask on event input

pub fn im9(&mut self) -> IM9_W<'_>

Bit 9 - CPU wakeup with interrupt mask on event input

pub fn im10(&mut self) -> IM10_W<'_>

Bit 10 - CPU wakeup with interrupt mask on event input

pub fn im11(&mut self) -> IM11_W<'_>

Bit 11 - CPU wakeup with interrupt mask on event input

pub fn im12(&mut self) -> IM12_W<'_>

Bit 12 - CPU wakeup with interrupt mask on event input

pub fn im13(&mut self) -> IM13_W<'_>

Bit 13 - CPU wakeup with interrupt mask on event input

pub fn im14(&mut self) -> IM14_W<'_>

Bit 14 - CPU wakeup with interrupt mask on event input

pub fn im15(&mut self) -> IM15_W<'_>

Bit 15 - CPU wakeup with interrupt mask on event input

pub fn im16(&mut self) -> IM16_W<'_>

Bit 16 - CPU wakeup with interrupt mask on event input

pub fn im17(&mut self) -> IM17_W<'_>

Bit 17 - CPU wakeup with interrupt mask on event input

pub fn im18(&mut self) -> IM18_W<'_>

Bit 18 - CPU wakeup with interrupt mask on event input

pub fn im19(&mut self) -> IM19_W<'_>

Bit 19 - CPU wakeup with interrupt mask on event input

pub fn im20(&mut self) -> IM20_W<'_>

Bit 20 - CPU wakeup with interrupt mask on event input

pub fn im21(&mut self) -> IM21_W<'_>

Bit 21 - CPU wakeup with interrupt mask on event input

pub fn im22(&mut self) -> IM22_W<'_>

Bit 22 - CPU wakeup with interrupt mask on event input

pub fn im23(&mut self) -> IM23_W<'_>

Bit 23 - CPU wakeup with interrupt mask on event input

pub fn im24(&mut self) -> IM24_W<'_>

Bit 24 - CPU wakeup with interrupt mask on event input

pub fn im25(&mut self) -> IM25_W<'_>

Bit 25 - CPU wakeup with interrupt mask on event input

pub fn im26(&mut self) -> IM26_W<'_>

Bit 26 - CPU wakeup with interrupt mask on event input

pub fn im27(&mut self) -> IM27_W<'_>

Bit 27 - CPU wakeup with interrupt mask on event input

pub fn im28(&mut self) -> IM28_W<'_>

Bit 28 - CPU wakeup with interrupt mask on event input

pub fn im29(&mut self) -> IM29_W<'_>

Bit 29 - CPU wakeup with interrupt mask on event input

pub fn im30(&mut self) -> IM30_W<'_>

Bit 30 - CPU wakeup with interrupt mask on event input

pub fn im31(&mut self) -> IM31_W<'_>

Bit 31 - CPU wakeup with interrupt mask on event input

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<IMR1_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<IMR1_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<IMR1_SPEC>> for W

fn from(writer: W<IMR1_SPEC>) -> W

Converts to this type from the input type.