Struct stm32g0xx_hal::stm32::lpuart::RegisterBlock[−][src]

#[repr(C)]pub struct RegisterBlock {
    pub cr1: Reg<u32, _CR1>,
    pub cr2: Reg<u32, _CR2>,
    pub cr3: Reg<u32, _CR3>,
    pub brr: Reg<u32, _BRR>,
    pub rqr: Reg<u32, _RQR>,
    pub isr: Reg<u32, _ISR>,
    pub icr: Reg<u32, _ICR>,
    pub rdr: Reg<u32, _RDR>,
    pub tdr: Reg<u32, _TDR>,
    pub presc: Reg<u32, _PRESC>,
    pub hwcfgr2: Reg<u32, _HWCFGR2>,
    pub hwcfgr1: Reg<u32, _HWCFGR1>,
    pub verr: Reg<u32, _VERR>,
    pub ipidr: Reg<u32, _IPIDR>,
    pub sidr: Reg<u32, _SIDR>,
    // some fields omitted
}

Register block

Fields

cr1: Reg<u32, _CR1>

0x00 - Control register 1

cr2: Reg<u32, _CR2>

0x04 - Control register 2

cr3: Reg<u32, _CR3>

0x08 - Control register 3

brr: Reg<u32, _BRR>

0x0c - Baud rate register

rqr: Reg<u32, _RQR>

0x18 - Request register

isr: Reg<u32, _ISR>

0x1c - Interrupt & status register

icr: Reg<u32, _ICR>

0x20 - Interrupt flag clear register

rdr: Reg<u32, _RDR>

0x24 - Receive data register

tdr: Reg<u32, _TDR>

0x28 - Transmit data register

presc: Reg<u32, _PRESC>

0x2c - Prescaler register

hwcfgr2: Reg<u32, _HWCFGR2>

0x3ec - LPUART Hardware Configuration register 2

hwcfgr1: Reg<u32, _HWCFGR1>

0x3f0 - LPUART Hardware Configuration register 1

verr: Reg<u32, _VERR>

0x3f4 - EXTI IP Version register

ipidr: Reg<u32, _IPIDR>

0x3f8 - EXTI Identification register

sidr: Reg<u32, _SIDR>

0x3fc - EXTI Size ID register

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