Module stm32g0::stm32g0c1::tim15::dcr

source · [−]
Expand description

DMA control register

Structs

DCR_SPEC

DMA control register

R

Register DCR reader

W

Register DCR writer

Type Definitions

DBA_R

Field DBA reader - DMA base address This 5-bit field defines the base-address for DMA transfers (when read/write access are done through the TIMx_DMAR address). DBA is defined as an offset starting from the address of the TIMx_CR1 register. Example: …

DBA_W

Field DBA writer - DMA base address This 5-bit field defines the base-address for DMA transfers (when read/write access are done through the TIMx_DMAR address). DBA is defined as an offset starting from the address of the TIMx_CR1 register. Example: …

DBL_R

Field DBL reader - DMA burst length This 5-bit field defines the length of DMA transfers (the timer recognizes a burst transfer when a read or a write access is done to the TIMx_DMAR address). …

DBL_W

Field DBL writer - DMA burst length This 5-bit field defines the length of DMA transfers (the timer recognizes a burst transfer when a read or a write access is done to the TIMx_DMAR address). …