#[repr(u8)]
pub enum PR_A {
DivideBy4,
DivideBy8,
DivideBy16,
DivideBy32,
DivideBy64,
DivideBy128,
DivideBy256,
DivideBy256bis,
}
Expand description
Prescaler divider These bits are write access protected see . They are written by software to select the prescaler divider feeding the counter clock. PVU bit of the must be reset in order to be able to change the prescaler divider. Note: Reading this register returns the prescaler value from the VDD voltage domain. This value may not be up to date/valid if a write operation to this register is ongoing. For this reason the value read from this register is valid only when the PVU bit in the status register (IWDG_SR) is reset.
Value on reset: 0
Variants
DivideBy4
0: Divider /4
DivideBy8
1: Divider /8
DivideBy16
2: Divider /16
DivideBy32
3: Divider /32
DivideBy64
4: Divider /64
DivideBy128
5: Divider /128
DivideBy256
6: Divider /256
DivideBy256bis
7: Divider /256
Trait Implementations
impl Copy for PR_A
impl StructuralPartialEq for PR_A
Auto Trait Implementations
impl RefUnwindSafe for PR_A
impl Send for PR_A
impl Sync for PR_A
impl Unpin for PR_A
impl UnwindSafe for PR_A
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more