pub type CHSELRMOD_W<'a, const O: u8> = BitWriter<'a, u32, CFGR1_SPEC, CHSELRMOD_A, O>;
Expand description

Field CHSELRMOD writer - Mode selection of the ADC_CHSELR register This bit is set and cleared by software to control the ADC_CHSELR feature: Note: The software is allowed to write this bit only when ADSTART bit is cleared to 0 (this ensures that no conversion is ongoing). If CCRDY is not yet asserted after channel configuration (writing ADC_CHSELR register or changing CHSELRMOD or SCANDIR), the value written to this bit is ignored.

Implementations

Each bit of the ADC_CHSELR register enables an input

ADC_CHSELR register is able to sequence up to 8 channels