Enum stm32g0::stm32g0b0::iwdg::pr::PR_A

#[repr(u8)]
pub enum PR_A {
    DivideBy4,
    DivideBy8,
    DivideBy16,
    DivideBy32,
    DivideBy64,
    DivideBy128,
    DivideBy256,
    DivideBy256bis,
}

Prescaler divider These bits are write access protected see . They are written by software to select the prescaler divider feeding the counter clock. PVU bit of the must be reset in order to be able to change the prescaler divider. Note: Reading this register returns the prescaler value from the VDD voltage domain. This value may not be up to date/valid if a write operation to this register is ongoing. For this reason the value read from this register is valid only when the PVU bit in the status register (IWDG_SR) is reset.

Value on reset: 0

Variants

DivideBy4

0: Divider /4

DivideBy8

1: Divider /8

DivideBy16

2: Divider /16

DivideBy32

3: Divider /32

DivideBy64

4: Divider /64

DivideBy128

5: Divider /128

DivideBy256

6: Divider /256

DivideBy256bis

7: Divider /256

Trait Implementations

impl Clone for PR_A

fn clone(&self) -> PR_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for PR_A

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl From<PR_A> for u8

fn from(variant: PR_A) -> Self

Converts to this type from the input type.

impl PartialEq<PR_A> for PR_A

fn eq(&self, other: &PR_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl Copy for PR_A

impl StructuralPartialEq for PR_A