Expand description
DBG APB freeze register 2
Structs§
- APB_
FZ2rs - DBG APB freeze register 2
Type Aliases§
- DBG_
TIM1_ STOP_ R - Field
DBG_TIM1_STOP
reader - Clocking of TIM1 counter when the core is halted This bit enables/disables the clock to the counter of TIM1 when the core is halted: - DBG_
TIM1_ STOP_ W - Field
DBG_TIM1_STOP
writer - Clocking of TIM1 counter when the core is halted This bit enables/disables the clock to the counter of TIM1 when the core is halted: - DBG_
TIM14_ STOP_ R - Field
DBG_TIM14_STOP
reader - Clocking of TIM14 counter when the core is halted This bit enables/disables the clock to the counter of TIM14 when the core is halted: - DBG_
TIM14_ STOP_ W - Field
DBG_TIM14_STOP
writer - Clocking of TIM14 counter when the core is halted This bit enables/disables the clock to the counter of TIM14 when the core is halted: - DBG_
TIM15_ STOP_ R - Field
DBG_TIM15_STOP
reader - Clocking of TIM15 counter when the core is halted This bit enables/disables the clock to the counter of TIM15 when the core is halted: Only available on STM32G071xx and STM32G081xx, reserved on STM32G031xx and STM32G041xx. - DBG_
TIM15_ STOP_ W - Field
DBG_TIM15_STOP
writer - Clocking of TIM15 counter when the core is halted This bit enables/disables the clock to the counter of TIM15 when the core is halted: Only available on STM32G071xx and STM32G081xx, reserved on STM32G031xx and STM32G041xx. - DBG_
TIM16_ STOP_ R - Field
DBG_TIM16_STOP
reader - Clocking of TIM16 counter when the core is halted This bit enables/disables the clock to the counter of TIM16 when the core is halted: - DBG_
TIM16_ STOP_ W - Field
DBG_TIM16_STOP
writer - Clocking of TIM16 counter when the core is halted This bit enables/disables the clock to the counter of TIM16 when the core is halted: - DBG_
TIM17_ STOP_ R - Field
DBG_TIM17_STOP
reader - Clocking of TIM17 counter when the core is halted This bit enables/disables the clock to the counter of TIM17 when the core is halted: - DBG_
TIM17_ STOP_ W - Field
DBG_TIM17_STOP
writer - Clocking of TIM17 counter when the core is halted This bit enables/disables the clock to the counter of TIM17 when the core is halted: - R
- Register
APB_FZ2
reader - W
- Register
APB_FZ2
writer