Struct stm32g0::stm32g0x1::adc::cfgr1::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn awdch1ch(&mut self) -> _AWDCH1CHW

Bits 26:30 - ADC analog watchdog 1 monitored channel selection

pub fn awd1en(&mut self) -> _AWD1ENW

Bit 23 - ADC analog watchdog 1 enable on scope ADC group regular

pub fn awd1sgl(&mut self) -> _AWD1SGLW

Bit 22 - ADC analog watchdog 1 monitoring a single channel or all channels

pub fn chselrmod(&mut self) -> _CHSELRMODW

Bit 21 - Mode selection of the ADC_CHSELR register

pub fn discen(&mut self) -> _DISCENW

Bit 16 - ADC group regular sequencer discontinuous mode

pub fn autoff(&mut self) -> _AUTOFFW

Bit 15 - Auto-off mode

pub fn wait(&mut self) -> _WAITW

Bit 14 - Wait conversion mode

pub fn cont(&mut self) -> _CONTW

Bit 13 - ADC group regular continuous conversion mode

pub fn ovrmod(&mut self) -> _OVRMODW

Bit 12 - ADC group regular overrun configuration

pub fn exten(&mut self) -> _EXTENW

Bits 10:11 - ADC group regular external trigger polarity

pub fn extsel(&mut self) -> _EXTSELW

Bits 6:8 - ADC group regular external trigger source

pub fn align(&mut self) -> _ALIGNW

Bit 5 - ADC data alignement

pub fn res(&mut self) -> _RESW

Bits 3:4 - ADC data resolution

pub fn scandir(&mut self) -> _SCANDIRW

Bit 2 - Scan sequence direction

pub fn dmacfg(&mut self) -> _DMACFGW

Bit 1 - ADC DMA transfer configuration

pub fn dmaen(&mut self) -> _DMAENW

Bit 0 - ADC DMA transfer enable