Module stm32g0::stm32g0x0::tim2::ccmr1_output

capture/compare mode register 1 (output mode)

Structs

CC1SR	Value of the field
CC2SR	Value of the field
OC1CER	Value of the field
OC1MR	Value of the field
OC1PER	Value of the field
OC1FER	Value of the field
OC2CER	Value of the field
OC2MR	Value of the field
OC2PER	Value of the field
OC2FER	Value of the field
OC1M_3R	Value of the field
OC2M_3R	Value of the field
R	Value read from the register
W	Value to write to the register
_CC1SW	Proxy
_CC2SW	Proxy
_OC1CEW	Proxy
_OC1MW	Proxy
_OC1PEW	Proxy
_OC1FEW	Proxy
_OC2CEW	Proxy
_OC2MW	Proxy
_OC2PEW	Proxy
_OC2FEW	Proxy
_OC1M_3W	Proxy
_OC2M_3W	Proxy