stm32g0/stm32g030/tamp/
ier.rs

1///Register `IER` reader
2pub type R = crate::R<IERrs>;
3///Register `IER` writer
4pub type W = crate::W<IERrs>;
5///Field `TAMP1IE` reader - Tamper 1 interrupt enable
6pub type TAMP1IE_R = crate::BitReader;
7///Field `TAMP1IE` writer - Tamper 1 interrupt enable
8pub type TAMP1IE_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `TAMP2IE` reader - Tamper 2 interrupt enable
10pub type TAMP2IE_R = crate::BitReader;
11///Field `TAMP2IE` writer - Tamper 2 interrupt enable
12pub type TAMP2IE_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `TAMP3IE` reader - Tamper 3 interrupt enable
14pub type TAMP3IE_R = crate::BitReader;
15///Field `TAMP3IE` writer - Tamper 3 interrupt enable
16pub type TAMP3IE_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `ITAMP3IE` reader - Internal tamper 3 interrupt enable: LSE monitoring
18pub type ITAMP3IE_R = crate::BitReader;
19///Field `ITAMP3IE` writer - Internal tamper 3 interrupt enable: LSE monitoring
20pub type ITAMP3IE_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `ITAMP4IE` reader - Internal tamper 4 interrupt enable: HSE monitoring
22pub type ITAMP4IE_R = crate::BitReader;
23///Field `ITAMP4IE` writer - Internal tamper 4 interrupt enable: HSE monitoring
24pub type ITAMP4IE_W<'a, REG> = crate::BitWriter<'a, REG>;
25///Field `ITAMP5IE` reader - Internal tamper 5 interrupt enable: RTC calendar overflow
26pub type ITAMP5IE_R = crate::BitReader;
27///Field `ITAMP5IE` writer - Internal tamper 5 interrupt enable: RTC calendar overflow
28pub type ITAMP5IE_W<'a, REG> = crate::BitWriter<'a, REG>;
29///Field `ITAMP6IE` reader - Internal tamper 6 interrupt enable: ST manufacturer readout
30pub type ITAMP6IE_R = crate::BitReader;
31///Field `ITAMP6IE` writer - Internal tamper 6 interrupt enable: ST manufacturer readout
32pub type ITAMP6IE_W<'a, REG> = crate::BitWriter<'a, REG>;
33impl R {
34    ///Bit 0 - Tamper 1 interrupt enable
35    #[inline(always)]
36    pub fn tamp1ie(&self) -> TAMP1IE_R {
37        TAMP1IE_R::new((self.bits & 1) != 0)
38    }
39    ///Bit 1 - Tamper 2 interrupt enable
40    #[inline(always)]
41    pub fn tamp2ie(&self) -> TAMP2IE_R {
42        TAMP2IE_R::new(((self.bits >> 1) & 1) != 0)
43    }
44    ///Bit 2 - Tamper 3 interrupt enable
45    #[inline(always)]
46    pub fn tamp3ie(&self) -> TAMP3IE_R {
47        TAMP3IE_R::new(((self.bits >> 2) & 1) != 0)
48    }
49    ///Bit 18 - Internal tamper 3 interrupt enable: LSE monitoring
50    #[inline(always)]
51    pub fn itamp3ie(&self) -> ITAMP3IE_R {
52        ITAMP3IE_R::new(((self.bits >> 18) & 1) != 0)
53    }
54    ///Bit 19 - Internal tamper 4 interrupt enable: HSE monitoring
55    #[inline(always)]
56    pub fn itamp4ie(&self) -> ITAMP4IE_R {
57        ITAMP4IE_R::new(((self.bits >> 19) & 1) != 0)
58    }
59    ///Bit 20 - Internal tamper 5 interrupt enable: RTC calendar overflow
60    #[inline(always)]
61    pub fn itamp5ie(&self) -> ITAMP5IE_R {
62        ITAMP5IE_R::new(((self.bits >> 20) & 1) != 0)
63    }
64    ///Bit 21 - Internal tamper 6 interrupt enable: ST manufacturer readout
65    #[inline(always)]
66    pub fn itamp6ie(&self) -> ITAMP6IE_R {
67        ITAMP6IE_R::new(((self.bits >> 21) & 1) != 0)
68    }
69}
70impl core::fmt::Debug for R {
71    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
72        f.debug_struct("IER")
73            .field("tamp1ie", &self.tamp1ie())
74            .field("tamp2ie", &self.tamp2ie())
75            .field("tamp3ie", &self.tamp3ie())
76            .field("itamp3ie", &self.itamp3ie())
77            .field("itamp4ie", &self.itamp4ie())
78            .field("itamp5ie", &self.itamp5ie())
79            .field("itamp6ie", &self.itamp6ie())
80            .finish()
81    }
82}
83impl W {
84    ///Bit 0 - Tamper 1 interrupt enable
85    #[inline(always)]
86    pub fn tamp1ie(&mut self) -> TAMP1IE_W<IERrs> {
87        TAMP1IE_W::new(self, 0)
88    }
89    ///Bit 1 - Tamper 2 interrupt enable
90    #[inline(always)]
91    pub fn tamp2ie(&mut self) -> TAMP2IE_W<IERrs> {
92        TAMP2IE_W::new(self, 1)
93    }
94    ///Bit 2 - Tamper 3 interrupt enable
95    #[inline(always)]
96    pub fn tamp3ie(&mut self) -> TAMP3IE_W<IERrs> {
97        TAMP3IE_W::new(self, 2)
98    }
99    ///Bit 18 - Internal tamper 3 interrupt enable: LSE monitoring
100    #[inline(always)]
101    pub fn itamp3ie(&mut self) -> ITAMP3IE_W<IERrs> {
102        ITAMP3IE_W::new(self, 18)
103    }
104    ///Bit 19 - Internal tamper 4 interrupt enable: HSE monitoring
105    #[inline(always)]
106    pub fn itamp4ie(&mut self) -> ITAMP4IE_W<IERrs> {
107        ITAMP4IE_W::new(self, 19)
108    }
109    ///Bit 20 - Internal tamper 5 interrupt enable: RTC calendar overflow
110    #[inline(always)]
111    pub fn itamp5ie(&mut self) -> ITAMP5IE_W<IERrs> {
112        ITAMP5IE_W::new(self, 20)
113    }
114    ///Bit 21 - Internal tamper 6 interrupt enable: ST manufacturer readout
115    #[inline(always)]
116    pub fn itamp6ie(&mut self) -> ITAMP6IE_W<IERrs> {
117        ITAMP6IE_W::new(self, 21)
118    }
119}
120/**TAMP interrupt enable register
121
122You can [`read`](crate::Reg::read) this register and get [`ier::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ier::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
123
124See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G030.html#TAMP:IER)*/
125pub struct IERrs;
126impl crate::RegisterSpec for IERrs {
127    type Ux = u32;
128}
129///`read()` method returns [`ier::R`](R) reader structure
130impl crate::Readable for IERrs {}
131///`write(|w| ..)` method takes [`ier::W`](W) writer structure
132impl crate::Writable for IERrs {
133    type Safety = crate::Unsafe;
134}
135///`reset()` method sets IER to value 0
136impl crate::Resettable for IERrs {}
stm32g0/stm32g030/tamp/ier.rs

stm32g0/stm32g030/tamp/
ier.rs
