pub struct W(_);
Expand description
Register CR2
writer
Implementations
sourceimpl W
impl W
sourcepub fn ccpc(&mut self) -> CCPC_W<'_, 0>
pub fn ccpc(&mut self) -> CCPC_W<'_, 0>
Bit 0 - Capture/compare preloaded control Note: This bit acts only on channels that have a complementary output.
sourcepub fn ccus(&mut self) -> CCUS_W<'_, 2>
pub fn ccus(&mut self) -> CCUS_W<'_, 2>
Bit 2 - Capture/compare control update selection Note: This bit acts only on channels that have a complementary output.
sourcepub fn mms(&mut self) -> MMS_W<'_, 4>
pub fn mms(&mut self) -> MMS_W<'_, 4>
Bits 4:6 - Master mode selection These bits allow selected information to be sent in master mode to slave timers for synchronization (TRGO). The combination is as follows: Note: The clock of the slave timer or ADC must be enabled prior to receive events from the master timer, and must not be changed on-the-fly while triggers are received from the master timer.
sourcepub fn ois1(&mut self) -> OIS1_W<'_, 8>
pub fn ois1(&mut self) -> OIS1_W<'_, 8>
Bit 8 - Output Idle state 1 (OC1 output) Note: This bit can not be modified as long as LOCK level 1, 2 or 3 has been programmed (LOCK bits in TIMx_BDTR register).
sourcepub fn ois1n(&mut self) -> OIS1N_W<'_, 9>
pub fn ois1n(&mut self) -> OIS1N_W<'_, 9>
Bit 9 - Output Idle state 1 (OC1N output) Note: This bit can not be modified as long as LOCK level 1, 2 or 3 has been programmed (LOCK bits in TIMx_BDTR register).
sourcepub fn ois2(&mut self) -> OIS2_W<'_, 10>
pub fn ois2(&mut self) -> OIS2_W<'_, 10>
Bit 10 - Output Idle state 2 (OC2 output) Refer to OIS1 bit
sourcepub fn ois2n(&mut self) -> OIS2N_W<'_, 11>
pub fn ois2n(&mut self) -> OIS2N_W<'_, 11>
Bit 11 - Output Idle state 2 (OC2N output) Refer to OIS1N bit
sourcepub fn ois3(&mut self) -> OIS3_W<'_, 12>
pub fn ois3(&mut self) -> OIS3_W<'_, 12>
Bit 12 - Output Idle state 3 (OC3 output) Refer to OIS1 bit
sourcepub fn ois3n(&mut self) -> OIS3N_W<'_, 13>
pub fn ois3n(&mut self) -> OIS3N_W<'_, 13>
Bit 13 - Output Idle state 3 (OC3N output) Refer to OIS1N bit
sourcepub fn ois4(&mut self) -> OIS4_W<'_, 14>
pub fn ois4(&mut self) -> OIS4_W<'_, 14>
Bit 14 - Output Idle state 4 (OC4 output) Refer to OIS1 bit
sourcepub fn ois5(&mut self) -> OIS5_W<'_, 16>
pub fn ois5(&mut self) -> OIS5_W<'_, 16>
Bit 16 - Output Idle state 5 (OC5 output) Refer to OIS1 bit
sourcepub fn ois6(&mut self) -> OIS6_W<'_, 18>
pub fn ois6(&mut self) -> OIS6_W<'_, 18>
Bit 18 - Output Idle state 6 (OC6 output) Refer to OIS1 bit
sourcepub fn mms2(&mut self) -> MMS2_W<'_, 20>
pub fn mms2(&mut self) -> MMS2_W<'_, 20>
Bits 20:23 - Master mode selection 2 These bits allow the information to be sent to ADC for synchronization (TRGO2) to be selected. The combination is as follows: Note: The clock of the slave timer or ADC must be enabled prior to receive events from the master timer, and must not be changed on-the-fly while triggers are received from the master timer.
Methods from Deref<Target = W<CR2_SPEC>>
Trait Implementations
Auto Trait Implementations
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more