Struct stm32g0::stm32g0c1::fdcan1::ir::W

pub struct W(_);

Register IR writer

Implementations

impl W

pub fn rf0n(&mut self) -> RF0N_W<'_, 0>

Bit 0 - Rx FIFO 0 new message

pub fn rf0f(&mut self) -> RF0F_W<'_, 1>

Bit 1 - Rx FIFO 0 full

pub fn rf0l(&mut self) -> RF0L_W<'_, 2>

Bit 2 - Rx FIFO 0 message lost

pub fn rf1n(&mut self) -> RF1N_W<'_, 3>

Bit 3 - Rx FIFO 1 new message

pub fn rf1f(&mut self) -> RF1F_W<'_, 4>

Bit 4 - Rx FIFO 1 full

pub fn rf1l(&mut self) -> RF1L_W<'_, 5>

Bit 5 - Rx FIFO 1 message lost

pub fn hpm(&mut self) -> HPM_W<'_, 6>

Bit 6 - High-priority message

pub fn tc(&mut self) -> TC_W<'_, 7>

Bit 7 - Transmission completed

pub fn tcf(&mut self) -> TCF_W<'_, 8>

Bit 8 - Transmission cancellation finished

pub fn tfe(&mut self) -> TFE_W<'_, 9>

Bit 9 - Tx FIFO empty

pub fn tefn(&mut self) -> TEFN_W<'_, 10>

Bit 10 - Tx event FIFO New Entry

pub fn teff(&mut self) -> TEFF_W<'_, 11>

Bit 11 - Tx event FIFO full

pub fn tefl(&mut self) -> TEFL_W<'_, 12>

Bit 12 - Tx event FIFO element lost

pub fn tsw(&mut self) -> TSW_W<'_, 13>

Bit 13 - Timestamp wraparound

pub fn mraf(&mut self) -> MRAF_W<'_, 14>

Bit 14 - Message RAM access failure The flag is set when the Rx handler: has not completed acceptance filtering or storage of an accepted message until the arbitration field of the following message has been received. In this case acceptance filtering or message storage is aborted and the Rx Handler starts processing of the following message. was unable to write a message to the message RAM. In this case message storage is aborted. In both cases the FIFO put index is not updated. The partly stored message is overwritten when the next message is stored to this location. The flag is also set when the Tx Handler was not able to read a message from the Message RAM in time. In this case message transmission is aborted. In case of a Tx Handler access failure the FDCAN is switched into Restricted Operation Mode (see mode). To leave Restricted Operation Mode, the Host CPU has to reset CCCR.ASM.

pub fn too(&mut self) -> TOO_W<'_, 15>

Bit 15 - Timeout occurred

pub fn elo(&mut self) -> ELO_W<'_, 16>

Bit 16 - Error logging overflow

pub fn ep(&mut self) -> EP_W<'_, 17>

Bit 17 - Error passive

pub fn ew(&mut self) -> EW_W<'_, 18>

Bit 18 - Warning status

pub fn bo(&mut self) -> BO_W<'_, 19>

Bit 19 - Bus_Off status

pub fn wdi(&mut self) -> WDI_W<'_, 20>

Bit 20 - Watchdog interrupt

pub fn pea(&mut self) -> PEA_W<'_, 21>

Bit 21 - Protocol error in arbitration phase (nominal bit time is used)

pub fn ped(&mut self) -> PED_W<'_, 22>

Bit 22 - Protocol error in data phase (data bit time is used)

pub fn ara(&mut self) -> ARA_W<'_, 23>

Bit 23 - Access to reserved address

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<IR_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<IR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<IR_SPEC>> for W

fn from(writer: W<IR_SPEC>) -> Self

Converts to this type from the input type.