stm32g0/stm32g0c1/usb/
daddr.rs

1#[doc = "Register `DADDR` reader"]
2pub struct R(crate::R<DADDR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DADDR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DADDR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DADDR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DADDR` writer"]
17pub struct W(crate::W<DADDR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DADDR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DADDR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DADDR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ADD` reader - Device address Device mode These bits contain the USB function address assigned by the host PC during the enumeration process. Both this field and the endpoint/channel Address (EA) field in the associated USB_EPnR register must match with the information contained in a USB token in order to handle a transaction to the required endpoint. Host mode These bits contain the address transmitted with the LPM transaction"]
38pub type ADD_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `ADD` writer - Device address Device mode These bits contain the USB function address assigned by the host PC during the enumeration process. Both this field and the endpoint/channel Address (EA) field in the associated USB_EPnR register must match with the information contained in a USB token in order to handle a transaction to the required endpoint. Host mode These bits contain the address transmitted with the LPM transaction"]
40pub type ADD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DADDR_SPEC, u8, u8, 7, O>;
41#[doc = "Field `EF` reader - Enable function This bit is set by the software to enable the USB device. The address of this device is contained in the following ADD\\[6:0\\]
42bits. If this bit is at '0 no transactions are handled, irrespective of the settings of USB_EPnR registers."]
43pub type EF_R = crate::BitReader<bool>;
44#[doc = "Field `EF` writer - Enable function This bit is set by the software to enable the USB device. The address of this device is contained in the following ADD\\[6:0\\]
45bits. If this bit is at '0 no transactions are handled, irrespective of the settings of USB_EPnR registers."]
46pub type EF_W<'a, const O: u8> = crate::BitWriter<'a, u32, DADDR_SPEC, bool, O>;
47impl R {
48    #[doc = "Bits 0:6 - Device address Device mode These bits contain the USB function address assigned by the host PC during the enumeration process. Both this field and the endpoint/channel Address (EA) field in the associated USB_EPnR register must match with the information contained in a USB token in order to handle a transaction to the required endpoint. Host mode These bits contain the address transmitted with the LPM transaction"]
49    #[inline(always)]
50    pub fn add(&self) -> ADD_R {
51        ADD_R::new((self.bits & 0x7f) as u8)
52    }
53    #[doc = "Bit 7 - Enable function This bit is set by the software to enable the USB device. The address of this device is contained in the following ADD\\[6:0\\]
54bits. If this bit is at '0 no transactions are handled, irrespective of the settings of USB_EPnR registers."]
55    #[inline(always)]
56    pub fn ef(&self) -> EF_R {
57        EF_R::new(((self.bits >> 7) & 1) != 0)
58    }
59}
60impl W {
61    #[doc = "Bits 0:6 - Device address Device mode These bits contain the USB function address assigned by the host PC during the enumeration process. Both this field and the endpoint/channel Address (EA) field in the associated USB_EPnR register must match with the information contained in a USB token in order to handle a transaction to the required endpoint. Host mode These bits contain the address transmitted with the LPM transaction"]
62    #[inline(always)]
63    pub fn add(&mut self) -> ADD_W<0> {
64        ADD_W::new(self)
65    }
66    #[doc = "Bit 7 - Enable function This bit is set by the software to enable the USB device. The address of this device is contained in the following ADD\\[6:0\\]
67bits. If this bit is at '0 no transactions are handled, irrespective of the settings of USB_EPnR registers."]
68    #[inline(always)]
69    pub fn ef(&mut self) -> EF_W<7> {
70        EF_W::new(self)
71    }
72    #[doc = "Writes raw bits to the register."]
73    #[inline(always)]
74    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
75        self.0.bits(bits);
76        self
77    }
78}
79#[doc = "USB device address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [daddr](index.html) module"]
80pub struct DADDR_SPEC;
81impl crate::RegisterSpec for DADDR_SPEC {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [daddr::R](R) reader structure"]
85impl crate::Readable for DADDR_SPEC {
86    type Reader = R;
87}
88#[doc = "`write(|w| ..)` method takes [daddr::W](W) writer structure"]
89impl crate::Writable for DADDR_SPEC {
90    type Writer = W;
91}
92#[doc = "`reset()` method sets DADDR to value 0"]
93impl crate::Resettable for DADDR_SPEC {
94    #[inline(always)]
95    fn reset_value() -> Self::Ux {
96        0
97    }
98}
stm32g0/stm32g0c1/usb/daddr.rs

stm32g0/stm32g0c1/usb/
daddr.rs
