1#[doc = "Register `CCER` reader"]
2pub struct R(crate::R<CCER_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CCER_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CCER_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CCER_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CCER` writer"]
17pub struct W(crate::W<CCER_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CCER_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CCER_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CCER_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CC1E` reader - Capture/Compare 1 output enable."]
38pub type CC1E_R = crate::BitReader<bool>;
39#[doc = "Field `CC1E` writer - Capture/Compare 1 output enable."]
40pub type CC1E_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
41#[doc = "Field `CC1P` reader - Capture/Compare 1 output Polarity. When CC1 channel is configured as input, both CC1NP/CC1P bits select the active polarity of TI1FP1 and TI2FP1 for trigger or capture operations. CC1NP=0, CC1P=0: non-inverted/rising edge. The circuit is sensitive to TIxFP1 rising edge (capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is not inverted (trigger operation in gated mode or encoder mode). CC1NP=0, CC1P=1: inverted/falling edge. The circuit is sensitive to TIxFP1 falling edge (capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is inverted (trigger operation in gated mode or encoder mode). CC1NP=1, CC1P=1: non-inverted/both edges. The circuit is sensitive to both TIxFP1 rising and falling edges (capture or trigger operations in reset, external clock or trigger mode), TIxFP1is not inverted (trigger operation in gated mode). This configuration must not be used in encoder mode. CC1NP=1, CC1P=0: This configuration is reserved, it must not be used."]
42pub type CC1P_R = crate::BitReader<bool>;
43#[doc = "Field `CC1P` writer - Capture/Compare 1 output Polarity. When CC1 channel is configured as input, both CC1NP/CC1P bits select the active polarity of TI1FP1 and TI2FP1 for trigger or capture operations. CC1NP=0, CC1P=0: non-inverted/rising edge. The circuit is sensitive to TIxFP1 rising edge (capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is not inverted (trigger operation in gated mode or encoder mode). CC1NP=0, CC1P=1: inverted/falling edge. The circuit is sensitive to TIxFP1 falling edge (capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is inverted (trigger operation in gated mode or encoder mode). CC1NP=1, CC1P=1: non-inverted/both edges. The circuit is sensitive to both TIxFP1 rising and falling edges (capture or trigger operations in reset, external clock or trigger mode), TIxFP1is not inverted (trigger operation in gated mode). This configuration must not be used in encoder mode. CC1NP=1, CC1P=0: This configuration is reserved, it must not be used."]
44pub type CC1P_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
45#[doc = "Field `CC1NP` reader - Capture/Compare 1 output Polarity. CC1 channel configured as output: CC1NP must be kept cleared in this case. CC1 channel configured as input: This bit is used in conjunction with CC1P to define TI1FP1/TI2FP1 polarity. refer to CC1P description."]
46pub type CC1NP_R = crate::BitReader<bool>;
47#[doc = "Field `CC1NP` writer - Capture/Compare 1 output Polarity. CC1 channel configured as output: CC1NP must be kept cleared in this case. CC1 channel configured as input: This bit is used in conjunction with CC1P to define TI1FP1/TI2FP1 polarity. refer to CC1P description."]
48pub type CC1NP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
49#[doc = "Field `CC2E` reader - Capture/Compare 2 output enable. Refer to CC1E description"]
50pub type CC2E_R = crate::BitReader<bool>;
51#[doc = "Field `CC2E` writer - Capture/Compare 2 output enable. Refer to CC1E description"]
52pub type CC2E_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
53#[doc = "Field `CC2P` reader - Capture/Compare 2 output Polarity. refer to CC1P description"]
54pub type CC2P_R = crate::BitReader<bool>;
55#[doc = "Field `CC2P` writer - Capture/Compare 2 output Polarity. refer to CC1P description"]
56pub type CC2P_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
57#[doc = "Field `CC2NP` reader - Capture/Compare 2 output Polarity. Refer to CC1NP description"]
58pub type CC2NP_R = crate::BitReader<bool>;
59#[doc = "Field `CC2NP` writer - Capture/Compare 2 output Polarity. Refer to CC1NP description"]
60pub type CC2NP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
61#[doc = "Field `CC3E` reader - Capture/Compare 3 output enable. Refer to CC1E description"]
62pub type CC3E_R = crate::BitReader<bool>;
63#[doc = "Field `CC3E` writer - Capture/Compare 3 output enable. Refer to CC1E description"]
64pub type CC3E_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
65#[doc = "Field `CC3P` reader - Capture/Compare 3 output Polarity. Refer to CC1P description"]
66pub type CC3P_R = crate::BitReader<bool>;
67#[doc = "Field `CC3P` writer - Capture/Compare 3 output Polarity. Refer to CC1P description"]
68pub type CC3P_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
69#[doc = "Field `CC3NP` reader - Capture/Compare 3 output Polarity. Refer to CC1NP description"]
70pub type CC3NP_R = crate::BitReader<bool>;
71#[doc = "Field `CC3NP` writer - Capture/Compare 3 output Polarity. Refer to CC1NP description"]
72pub type CC3NP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
73#[doc = "Field `CC4E` reader - Capture/Compare 4 output enable. refer to CC1E description"]
74pub type CC4E_R = crate::BitReader<bool>;
75#[doc = "Field `CC4E` writer - Capture/Compare 4 output enable. refer to CC1E description"]
76pub type CC4E_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
77#[doc = "Field `CC4P` reader - Capture/Compare 4 output Polarity. Refer to CC1P description"]
78pub type CC4P_R = crate::BitReader<bool>;
79#[doc = "Field `CC4P` writer - Capture/Compare 4 output Polarity. Refer to CC1P description"]
80pub type CC4P_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
81#[doc = "Field `CC4NP` reader - Capture/Compare 4 output Polarity. Refer to CC1NP description"]
82pub type CC4NP_R = crate::BitReader<bool>;
83#[doc = "Field `CC4NP` writer - Capture/Compare 4 output Polarity. Refer to CC1NP description"]
84pub type CC4NP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
85impl R {
86 #[doc = "Bit 0 - Capture/Compare 1 output enable."]
87 #[inline(always)]
88 pub fn cc1e(&self) -> CC1E_R {
89 CC1E_R::new((self.bits & 1) != 0)
90 }
91 #[doc = "Bit 1 - Capture/Compare 1 output Polarity. When CC1 channel is configured as input, both CC1NP/CC1P bits select the active polarity of TI1FP1 and TI2FP1 for trigger or capture operations. CC1NP=0, CC1P=0: non-inverted/rising edge. The circuit is sensitive to TIxFP1 rising edge (capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is not inverted (trigger operation in gated mode or encoder mode). CC1NP=0, CC1P=1: inverted/falling edge. The circuit is sensitive to TIxFP1 falling edge (capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is inverted (trigger operation in gated mode or encoder mode). CC1NP=1, CC1P=1: non-inverted/both edges. The circuit is sensitive to both TIxFP1 rising and falling edges (capture or trigger operations in reset, external clock or trigger mode), TIxFP1is not inverted (trigger operation in gated mode). This configuration must not be used in encoder mode. CC1NP=1, CC1P=0: This configuration is reserved, it must not be used."]
92 #[inline(always)]
93 pub fn cc1p(&self) -> CC1P_R {
94 CC1P_R::new(((self.bits >> 1) & 1) != 0)
95 }
96 #[doc = "Bit 3 - Capture/Compare 1 output Polarity. CC1 channel configured as output: CC1NP must be kept cleared in this case. CC1 channel configured as input: This bit is used in conjunction with CC1P to define TI1FP1/TI2FP1 polarity. refer to CC1P description."]
97 #[inline(always)]
98 pub fn cc1np(&self) -> CC1NP_R {
99 CC1NP_R::new(((self.bits >> 3) & 1) != 0)
100 }
101 #[doc = "Bit 4 - Capture/Compare 2 output enable. Refer to CC1E description"]
102 #[inline(always)]
103 pub fn cc2e(&self) -> CC2E_R {
104 CC2E_R::new(((self.bits >> 4) & 1) != 0)
105 }
106 #[doc = "Bit 5 - Capture/Compare 2 output Polarity. refer to CC1P description"]
107 #[inline(always)]
108 pub fn cc2p(&self) -> CC2P_R {
109 CC2P_R::new(((self.bits >> 5) & 1) != 0)
110 }
111 #[doc = "Bit 7 - Capture/Compare 2 output Polarity. Refer to CC1NP description"]
112 #[inline(always)]
113 pub fn cc2np(&self) -> CC2NP_R {
114 CC2NP_R::new(((self.bits >> 7) & 1) != 0)
115 }
116 #[doc = "Bit 8 - Capture/Compare 3 output enable. Refer to CC1E description"]
117 #[inline(always)]
118 pub fn cc3e(&self) -> CC3E_R {
119 CC3E_R::new(((self.bits >> 8) & 1) != 0)
120 }
121 #[doc = "Bit 9 - Capture/Compare 3 output Polarity. Refer to CC1P description"]
122 #[inline(always)]
123 pub fn cc3p(&self) -> CC3P_R {
124 CC3P_R::new(((self.bits >> 9) & 1) != 0)
125 }
126 #[doc = "Bit 11 - Capture/Compare 3 output Polarity. Refer to CC1NP description"]
127 #[inline(always)]
128 pub fn cc3np(&self) -> CC3NP_R {
129 CC3NP_R::new(((self.bits >> 11) & 1) != 0)
130 }
131 #[doc = "Bit 12 - Capture/Compare 4 output enable. refer to CC1E description"]
132 #[inline(always)]
133 pub fn cc4e(&self) -> CC4E_R {
134 CC4E_R::new(((self.bits >> 12) & 1) != 0)
135 }
136 #[doc = "Bit 13 - Capture/Compare 4 output Polarity. Refer to CC1P description"]
137 #[inline(always)]
138 pub fn cc4p(&self) -> CC4P_R {
139 CC4P_R::new(((self.bits >> 13) & 1) != 0)
140 }
141 #[doc = "Bit 15 - Capture/Compare 4 output Polarity. Refer to CC1NP description"]
142 #[inline(always)]
143 pub fn cc4np(&self) -> CC4NP_R {
144 CC4NP_R::new(((self.bits >> 15) & 1) != 0)
145 }
146}
147impl W {
148 #[doc = "Bit 0 - Capture/Compare 1 output enable."]
149 #[inline(always)]
150 pub fn cc1e(&mut self) -> CC1E_W<0> {
151 CC1E_W::new(self)
152 }
153 #[doc = "Bit 1 - Capture/Compare 1 output Polarity. When CC1 channel is configured as input, both CC1NP/CC1P bits select the active polarity of TI1FP1 and TI2FP1 for trigger or capture operations. CC1NP=0, CC1P=0: non-inverted/rising edge. The circuit is sensitive to TIxFP1 rising edge (capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is not inverted (trigger operation in gated mode or encoder mode). CC1NP=0, CC1P=1: inverted/falling edge. The circuit is sensitive to TIxFP1 falling edge (capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is inverted (trigger operation in gated mode or encoder mode). CC1NP=1, CC1P=1: non-inverted/both edges. The circuit is sensitive to both TIxFP1 rising and falling edges (capture or trigger operations in reset, external clock or trigger mode), TIxFP1is not inverted (trigger operation in gated mode). This configuration must not be used in encoder mode. CC1NP=1, CC1P=0: This configuration is reserved, it must not be used."]
154 #[inline(always)]
155 pub fn cc1p(&mut self) -> CC1P_W<1> {
156 CC1P_W::new(self)
157 }
158 #[doc = "Bit 3 - Capture/Compare 1 output Polarity. CC1 channel configured as output: CC1NP must be kept cleared in this case. CC1 channel configured as input: This bit is used in conjunction with CC1P to define TI1FP1/TI2FP1 polarity. refer to CC1P description."]
159 #[inline(always)]
160 pub fn cc1np(&mut self) -> CC1NP_W<3> {
161 CC1NP_W::new(self)
162 }
163 #[doc = "Bit 4 - Capture/Compare 2 output enable. Refer to CC1E description"]
164 #[inline(always)]
165 pub fn cc2e(&mut self) -> CC2E_W<4> {
166 CC2E_W::new(self)
167 }
168 #[doc = "Bit 5 - Capture/Compare 2 output Polarity. refer to CC1P description"]
169 #[inline(always)]
170 pub fn cc2p(&mut self) -> CC2P_W<5> {
171 CC2P_W::new(self)
172 }
173 #[doc = "Bit 7 - Capture/Compare 2 output Polarity. Refer to CC1NP description"]
174 #[inline(always)]
175 pub fn cc2np(&mut self) -> CC2NP_W<7> {
176 CC2NP_W::new(self)
177 }
178 #[doc = "Bit 8 - Capture/Compare 3 output enable. Refer to CC1E description"]
179 #[inline(always)]
180 pub fn cc3e(&mut self) -> CC3E_W<8> {
181 CC3E_W::new(self)
182 }
183 #[doc = "Bit 9 - Capture/Compare 3 output Polarity. Refer to CC1P description"]
184 #[inline(always)]
185 pub fn cc3p(&mut self) -> CC3P_W<9> {
186 CC3P_W::new(self)
187 }
188 #[doc = "Bit 11 - Capture/Compare 3 output Polarity. Refer to CC1NP description"]
189 #[inline(always)]
190 pub fn cc3np(&mut self) -> CC3NP_W<11> {
191 CC3NP_W::new(self)
192 }
193 #[doc = "Bit 12 - Capture/Compare 4 output enable. refer to CC1E description"]
194 #[inline(always)]
195 pub fn cc4e(&mut self) -> CC4E_W<12> {
196 CC4E_W::new(self)
197 }
198 #[doc = "Bit 13 - Capture/Compare 4 output Polarity. Refer to CC1P description"]
199 #[inline(always)]
200 pub fn cc4p(&mut self) -> CC4P_W<13> {
201 CC4P_W::new(self)
202 }
203 #[doc = "Bit 15 - Capture/Compare 4 output Polarity. Refer to CC1NP description"]
204 #[inline(always)]
205 pub fn cc4np(&mut self) -> CC4NP_W<15> {
206 CC4NP_W::new(self)
207 }
208 #[doc = "Writes raw bits to the register."]
209 #[inline(always)]
210 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
211 self.0.bits(bits);
212 self
213 }
214}
215#[doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccer](index.html) module"]
216pub struct CCER_SPEC;
217impl crate::RegisterSpec for CCER_SPEC {
218 type Ux = u32;
219}
220#[doc = "`read()` method returns [ccer::R](R) reader structure"]
221impl crate::Readable for CCER_SPEC {
222 type Reader = R;
223}
224#[doc = "`write(|w| ..)` method takes [ccer::W](W) writer structure"]
225impl crate::Writable for CCER_SPEC {
226 type Writer = W;
227}
228#[doc = "`reset()` method sets CCER to value 0"]
229impl crate::Resettable for CCER_SPEC {
230 #[inline(always)]
231 fn reset_value() -> Self::Ux {
232 0
233 }
234}