Struct stm32g0::stm32g0c1::usart1::icr::W[][src]

pub struct W(_);
Expand description

Register ICR writer

Implementations

Bit 0 - Parity error clear flag Writing 1 to this bit clears the PE flag in the USART_ISR register.

Bit 1 - Framing error clear flag Writing 1 to this bit clears the FE flag in the USART_ISR register.

Bit 2 - Noise detected clear flag Writing 1 to this bit clears the NE flag in the USART_ISR register.

Bit 3 - Overrun error clear flag Writing 1 to this bit clears the ORE flag in the USART_ISR register.

Bit 4 - Idle line detected clear flag Writing 1 to this bit clears the IDLE flag in the USART_ISR register.

Bit 5 - TXFIFO empty clear flag Writing 1 to this bit clears the TXFE flag in the USART_ISR register.

Bit 6 - Transmission complete clear flag Writing 1 to this bit clears the TC flag in the USART_ISR register.

Bit 7 - Transmission complete before Guard time clear flag Writing 1 to this bit clears the TCBGT flag in the USART_ISR register.

Bit 8 - LIN break detection clear flag Writing 1 to this bit clears the LBDF flag in the USART_ISR register. Note: If LIN mode is not supported, this bit is reserved and must be kept at reset value. Refer to .

Bit 9 - CTS clear flag Writing 1 to this bit clears the CTSIF flag in the USART_ISR register. Note: If the hardware flow control feature is not supported, this bit is reserved and must be kept at reset value. Refer to .

Bit 11 - Receiver timeout clear flag Writing 1 to this bit clears the RTOF flag in the USART_ISR register. Note: If the USART does not support the Receiver timeout feature, this bit is reserved and must be kept at reset value. Refer to page 835.

Bit 12 - End of block clear flag Writing 1 to this bit clears the EOBF flag in the USART_ISR register. Note: If the USART does not support Smartcard mode, this bit is reserved and must be kept at reset value. Refer to .

Bit 13 - SPI slave underrun clear flag Writing 1 to this bit clears the UDRF flag in the USART_ISR register. Note: If the USART does not support SPI slave mode, this bit is reserved and must be kept at reset value. Refer to

Bit 17 - Character match clear flag Writing 1 to this bit clears the CMF flag in the USART_ISR register.

Bit 20 - Wakeup from low-power mode clear flag Writing 1 to this bit clears the WUF flag in the USART_ISR register. Note: If the USART does not support the wakeup from Stop feature, this bit is reserved and must be kept at reset value. Refer to page 835.

Writes raw bits to the register.

Methods from Deref<Target = W<ICR_SPEC>>

Writes raw bits to the register.

Trait Implementations

The resulting type after dereferencing.

Dereferences the value.

Mutably dereferences the value.

Performs the conversion.

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Mutably borrows from an owned value. Read more

Performs the conversion.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.