Struct stm32g0::stm32g0c1::tim2::ccer::R [−][src]
pub struct R(_);
Expand description
Register CCER
reader
Implementations
Bit 1 - Capture/Compare 1 output Polarity. When CC1 channel is configured as input, both CC1NP/CC1P bits select the active polarity of TI1FP1 and TI2FP1 for trigger or capture operations. CC1NP=0, CC1P=0: non-inverted/rising edge. The circuit is sensitive to TIxFP1 rising edge (capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is not inverted (trigger operation in gated mode or encoder mode). CC1NP=0, CC1P=1: inverted/falling edge. The circuit is sensitive to TIxFP1 falling edge (capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is inverted (trigger operation in gated mode or encoder mode). CC1NP=1, CC1P=1: non-inverted/both edges. The circuit is sensitive to both TIxFP1 rising and falling edges (capture or trigger operations in reset, external clock or trigger mode), TIxFP1is not inverted (trigger operation in gated mode). This configuration must not be used in encoder mode. CC1NP=1, CC1P=0: This configuration is reserved, it must not be used.
Bit 3 - Capture/Compare 1 output Polarity. CC1 channel configured as output: CC1NP must be kept cleared in this case. CC1 channel configured as input: This bit is used in conjunction with CC1P to define TI1FP1/TI2FP1 polarity. refer to CC1P description.
Bit 5 - Capture/Compare 2 output Polarity. refer to CC1P description
Bit 7 - Capture/Compare 2 output Polarity. Refer to CC1NP description
Bit 9 - Capture/Compare 3 output Polarity. Refer to CC1P description
Bit 11 - Capture/Compare 3 output Polarity. Refer to CC1NP description
Bit 12 - Capture/Compare 4 output enable. refer to CC1E description
Bit 13 - Capture/Compare 4 output Polarity. Refer to CC1P description